"A 2xVDD digital output buffer with gate driving stability and ..."

Chua-Chin Wang et al. (2023)

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DOI: 10.1016/J.VLSI.2023.02.004

access: closed

type: Journal Article

metadata version: 2023-09-30

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Chua-Chin Wang, Lean Karlo S. Tolentino, Shao-Wei Lu, Oliver Lexter July A. Jose, Ralph Gerard B. Sangalang, Tzung-Je Lee, Pang-Yen Lou, Wei-Chih Chang:
A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process. Integr. 90: 245-260 (2023)

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