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"High-Level Area/Delay/Power Estimation for Low Power System VLSIs with ..."
Shinichi Noda et al. (2002)
- Shinichi Noda, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki:
High-Level Area/Delay/Power Estimation for Low Power System VLSIs with Gated Clocks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(4): 827-834 (2002)
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