"Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues ..."

Bart R. Zeydel, Vojin G. Oklobdzija (2006)

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DOI: 10.1007/11847083_13

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Bart R. Zeydel, Vojin G. Oklobdzija:
Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations. PATMOS 2006: 127-136

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