"A New Dynamic Circuit Design Technique for High Performance TSC Checker ..."

A. Rao et al. (2004)

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DOI: 10.1109/IOLTS.2004.6

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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A. Rao, Th. Haniotakis, Y. Tsiatouhas, V. Kaky:
A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations. IOLTS 2004: 52-57

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