"Tracking Data Flow at Gate-Level through Structural Checking."

Thao Le et al. (2016)

> Home

Details and statistics

DOI: 10.1145/2902961.2903040

access: closed

type: Conference or Workshop Paper

metadata version: 2024-04-10

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/LeDTF016
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/LeDTF016
Thao Le, Jia Di, Mark M. Tehranipoor, Domenic Forte, Lei Wang:
Tracking Data Flow at Gate-Level through Structural Checking. ACM Great Lakes Symposium on VLSI 2016: 185-189

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.