"FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis ..."

Linfeng Du et al. (2023)

> Home

Details and statistics

DOI: 10.1145/3543622.3573188

access: closed

type: Conference or Workshop Paper

metadata version: 2023-02-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpga/DuLSX023
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/DuLSX023
Linfeng Du, Tingyuan Liang, Sharad Sinha, Zhiyao Xie, Wei Zhang:
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs. FPGA 2023: 15-25

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.