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Göran Jerke
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2020 – today
- 2024
- [c21]Goeran Jerke:
Physical Design Challenges for Automotive ASICs. ISPD 2024: 265 - 2022
- [c20]Alexander Hirler, Ulrich Abelein, M. Büttner, Ricarda Fischbach, Göran Jerke, Andreas Krinke, S. Simon:
Mission Profile Clustering Using a Universal Quantile Criterion. IRPS 2022: 1-9
2010 – 2019
- 2018
- [c19]Steve Bigalke, Jens Lienig, Göran Jerke, Jürgen Scheible, Roland Jancke:
The need and opportunities of electromigration-aware integrated circuit design. ICCAD 2018: 96 - 2016
- [c18]Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt:
SWARM: A Multi-agent System for Layout Automation in Analog Integrated Circuit Design. KES-AMSTA 2016: 15-31 - [c17]Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt:
Analog layout automation via self-organization: Enhancing the novel SWARM approach. LASCAS 2016: 55-58 - 2015
- [c16]Volker Meyer zu Bexten, Markus Tristl, Göran Jerke, Hartmut Marquardt, Dina Medhat:
Physical verification flow for hierarchical analog ic design constraints. ASP-DAC 2015: 447-453 - 2014
- [c15]Goeran Jerke, Andrew B. Kahng:
Mission profile aware IC design - A case study. DATE 2014: 1-6 - 2013
- [c14]Andreas Krinke, Maximilian Mittag, Göran Jerke, Jens Lienig:
Extended constraint management for analog and mixed-signal IC design. ECCTD 2013: 1-4 - [c13]Andreas Krinke, Goeran Jerke, Jens Lienig:
Adaptive data model for efficient constraint handling in AMS IC design. ICECS 2013: 285-288 - 2012
- [c12]Maximilian Mittag, Andreas Krinke, Göran Jerke, Wolfgang Rosenstiel:
Hierarchical propagation of geometric constraints for full-custom physical design of ICs. DATE 2012: 1471-1474 - 2010
- [c11]Göran Jerke, Jens Lienig:
Early-stage determination of current-density criticality in interconnects. ISQED 2010: 667-674
2000 – 2009
- 2009
- [c10]Ammar Nassaj, Jens Lienig, Goeran Jerke:
A new methodology for constraint-driven layout design of analog circuits. ICECS 2009: 996-999 - [c9]Göran Jerke, Jens Lienig:
Constraint-driven design: the next step towards analog design automation. ISPD 2009: 75-82 - 2008
- [c8]Jan B. Freuer, Göran Jerke, Joachim Gerlach, Wolfgang Nebel:
On the Verification of High-Order Constraint Compliance in IC Design. DATE 2008: 26-31 - [c7]Ammar Nassaj, Jens Lienig, Göran Jerke:
A constraint-driven methodology for placement of analog and mixed-signal integrated circuits. ICECS 2008: 770-773 - 2005
- [c6]Jens Lienig, Göran Jerke:
Electromigration-Aware Physical Design of Integrated Circuits. VLSI Design 2005: 77-82 - 2004
- [j1]Göran Jerke, Jens Lienig:
Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1): 80-90 (2004) - [c5]Goeran Jerke, Jens Lienig, Jürgen Scheible:
Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs. DAC 2004: 181-184 - 2003
- [c4]Jens Lienig, Göran Jerke:
Current-driven wire planning for electromigration avoidance in analog circuits. ASP-DAC 2003: 783-788 - 2002
- [c3]Goeran Jerke, Jens Lienig:
Hierarchical Current Density Verification for Electromigration Analysis in Arbitrary Shaped Metallization Patterns of Analog Circuits. DATE 2002: 464-469 - [c2]Jens Lienig, Goeran Jerke, Thorsten Adler:
Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing. ASP-DAC/VLSI Design 2002: 372- - 2001
- [c1]Jens Lienig, Goeran Jerke, Thorsten Adler:
AnalogRouter: a new approach of current-driven routing for analog circuits. DATE 2001: 819
Coauthor Index
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