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ORCIDSanjay V. Kumar
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2010 – 2019
- 2012
[c8]Jianxin Fang, Saket Gupta, Sanjay V. Kumar, Sravan K. Marella, Vivek Mishra, Pingqiang Zhou, Sachin S. Sapatnekar:
Circuit reliability: From Physics to Architectures: Embedded tutorial paper. ICCAD 2012: 243-246- [c7]Sravan K. Marella, Sanjay V. Kumar, Sachin S. Sapatnekar:
A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations. ICCAD 2012: 317-324 - 2011
- [j3]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar
:
Adaptive Techniques for Overcoming Performance Degradation Due to Aging in CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 603-614 (2011)
2000 – 2009
- 2009
- [c6]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
Adaptive techniques for overcoming performance degradation due to aging in digital circuits. ASP-DAC 2009: 284-289 - 2008
- [j2]Yong Zhan, Sanjay V. Kumar, Sachin S. Sapatnekar:
Thermally Aware Design. Found. Trends Electron. Des. Autom. 2(3): 255-370 (2008) - [j1]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
Body Bias Voltage Computations for Process and Temperature Compensation. IEEE Trans. Very Large Scale Integr. Syst. 16(3): 249-262 (2008) - [c5]Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S. Sapatnekar:
A framework for block-based timing sensitivity analysis. DAC 2008: 688-693 - 2007
- [c4]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
NBTI-Aware Synthesis of Digital Circuits. DAC 2007: 370-375 - 2006
- [c3]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems. ASP-DAC 2006: 559-564 - [c2]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
An analytical model for negative bias temperature instability. ICCAD 2006: 493-496 - [c1]Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar:
Impact of NBTI on SRAM Read Stability and Design for Reliability. ISQED 2006: 210-218
Coauthor Index
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