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2010 – 2019
- 2019
[c7]Hassen Aziza, Hussein Bazzi, Jérémy Postel-Pellerin, Pierre Canet, Mathieu Moreau
, Adnan Harb:
An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits. DTIS 2019: 1-5- [c6]Jérémy Postel-Pellerin, Hussein Bazzi, Hassen Aziza, Pierre Canet, Mathieu Moreau, Vincenzo Della Marca, Adnan Harb:
True random number generation exploiting SET voltage variability in resistive RAM memory arrays. NVMTS 2019: 1-5 - 2016
- [j5]Pierre Canet, Jérémy Postel-Pellerin, Hassen Aziza:
Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories. Microelectron. Reliab. 64: 36-41 (2016) - 2014
- [j4]Vincenzo Della Marca, Jérémy Postel-Pellerin, Guillaume Just, Pierre Canet, Jean-Luc Ogier:
Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories. Microelectron. Reliab. 54(9-10): 2262-2265 (2014) - 2013
- [j3]Pierre Canet, Jérémy Postel-Pellerin, Jean-Luc Ogier:
Access resistor modelling for EEPROM's retention test vehicle. Microelectron. Reliab. 53(9-11): 1218-1223 (2013)
2000 – 2009
- 2009
- [j2]Jérémy Postel-Pellerin, Frédéric Lalande, Pierre Canet, Rachid Bouchakour, F. Jeuland, B. Bertello, B. Villard:
Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories. Microelectron. Reliab. 49(9-11): 1056-1059 (2009) - [j1]Jérémy Postel-Pellerin, Frédéric Lalande, Pierre Canet, Rachid Bouchakour, F. Jeuland, L. Morancho:
Modeling charge variation during data retention of MLC Flash memories. Microelectron. Reliab. 49(9-11): 1060-1063 (2009) - 2008
- [c5]Anthony Maure, Pierre Canet, Frédéric Lalande, Bertrand Delsuc, Jean Devin:
Flash Memory Cell Compact Modeling Using PSP Model. BMAS 2008: 45-49 - 2002
- [c4]Romain Laffont, J. Razafindramora, Pierre Canet, Rachid Bouchakour, Jean-Michel Mirabel:
Decreasing EEPROM Programming Bias With Negative Voltage, Reliability Impact. MTDT 2002: 168-176 - 2001
- [c3]Rachid Bouchakour, Nadia Harabech, Pierre Canet, Philippe Boivin, Jean Michel Mirable:
Modeling of a floating-gate EEPROM cell using a charge sheet approach including variable tunneling capacitance and polysilicon gate depletion effect. ISCAS (4) 2001: 822-825 - [c2]Pierre Canet, Rachid Bouchakour, Nadia Harabech, Philippe Boivin, Jean-Michel Mirabel:
EEPROM programming study-time and degradation aspects. ISCAS (4) 2001: 846-849 - 2000
- [c1]Nadia Harabech, Rachid Bouchakour, Pierre Canet, Philippe Pannier, Jean-Pierre Sorbier:
Extraction of Fowler-Nordheim parameters of thin SiO2 oxide film including polysilicon gate depletion: validation with an EEPROM memory cell. ISCAS 2000: 441-444
Coauthor Index
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