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M. Varanasi

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Journal Articles

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1993
[j1]
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Mario Kovac, N. Ranganathan, M. Varanasi:
SIGMA: a VLSI systolic array implementation of a Galois field GF(2 ^m) based multiplication and division algorithm. IEEE Trans. Very Large Scale Integr. Syst. 1(1): 22-30 (1993)

Conference and Workshop Papers

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1993
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Mario Kovac, N. Ranganathan, M. Varanasi:
SIGMA: A VLSI Chip for Galois Field GF(2^m) Based Multiplication and Division. VLSI Design 1993: 25-30
1992
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Mario Kovac, N. Ranganathan, M. Varanasi:
A Systolic Algorithm and Architecture for Galois Field Arithmetic. IPPS 1992: 283-288

Coauthor Index

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