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2020 – today
- 2023
[i2]Guanwen Zhong, Aditya Kolekar, Burin Amornpaisannon, Inho Choi, Haris Javaid, Mario Baldi:
A Primer on RecoNIC: RDMA-enabled Compute Offloading on SmartNIC. CoRR abs/2312.06207 (2023)
2010 – 2019
- 2019
- [j3]Guanwen Zhong
, Akshat Dubey, Cheng Tan, Tulika Mitra:
Synergy: An HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. ACM Trans. Embed. Comput. Syst. 18(2): 13:1-13:23 (2019) - [c6]Guanwen Zhong, Haris Javaid, Hassaan Saadat, Lingchao Xu, Chengchen Hu, Gordon J. Brebner:
FastProxy: Hardware and Software Acceleration of Stratum Mining Proxy. CVCBT 2019: 73-76 - 2018
- [i1]Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra:
Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. CoRR abs/1804.00706 (2018) - 2017
- [j2]Siqi Wang, Guanwen Zhong, Tulika Mitra:
CGPredict: Embedded GPU Performance Estimation from Single-Threaded Applications. ACM Trans. Embed. Comput. Syst. 16(5s): 146:1-146:22 (2017) - [c5]Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smaïl Niar:
Design Space exploration of FPGA-based accelerators with multi-level parallelism. DATE 2017: 1141-1146 - [c4]Mariem Makni, Smaïl Niar, Mouna Baklouti, Guanwen Zhong, Tulika Mitra, Mohamed Abid:
A Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures. PDP 2017: 85-92 - 2016
- [j1]Guanwen Zhong, Smaïl Niar, Alok Prakash, Tulika Mitra:
Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices. IEEE Trans. Veh. Technol. 65(6): 4802-4812 (2016) - [c3]Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smaïl Niar:
Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators. DAC 2016: 136:1-136:6 - 2014
- [c2]Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar:
Design space exploration of multiple loops on FPGAs using high level synthesis. ICCD 2014: 456-463 - 2011
- [c1]Guanwen Zhong, Hongbin Zheng, ZhenHua Jin, Dihu Chen, Zhiyong Pang:
1024-point pipeline FFT processor with pointer FIFOs based on FPGA. VLSI-SoC 2011: 122-125
Coauthor Index
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