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2010 – 2019
- 2019
[j10]Med fehmi Chatmen
, Adel Baganne, Rached Tourki:
Low latency multicasting architecture implemented using new network topology. Microprocess. Microsystems 68: 47-57 (2019)- 2017
- [j9]Fatma Sbiaa, Sonia Kotel, Zeghid Medien, Rached Tourki, Mohsen Machhout, Adel Baganne:
High-Level Implementation of a Chaotic and AES Based Crypto-System. J. Circuits Syst. Comput. 26(7): 1750122:1-1750122:23 (2017) - 2016
- [c17]Sonia Kotel, Fatma Sbiaa, Zeghid Medien, Mohsen Machhout, Adel Baganne, Rached Tourki:
Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator. CIT 2016: 375-382 - [c16]Fatma Sbiaa, Sonia Kotel, Zeghid Medien, Rached Tourki, Mohsen Machhout, Adel Baganne:
A Selective Encryption Scheme with Multiple Security Levels for the H.264/AVC Video Coding Standard. CIT 2016: 391-398 - [c15]Sonia Kotel, Fatma Sbiaa, Zeghid Medien, Mohsen Machhout, Adel Baganne, Rached Tourki:
Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices. AICCSA 2016: 1-7 - 2015
- [c14]Fatma Sbiaa, Adel Baganne, Zeghid Medien, Rached Tourki:
A new approach for encryption system based on block cipher algorithms and logistic function. SSD 2015: 1-5 - 2012
- [j8]Meriam Kallel, Younes Lahbib, Adel Baganne, Rached Tourki:
Monitoring transaction level SystemC models using a generic and aspect-oriented framework. Int. J. Comput. Aided Eng. Technol. 4(3): 229-249 (2012) - 2010
- [j7]Rafik Ben-Tekaya, Adel Baganne, Kholdoun Torki, Rached Tourki:
Performance evaluation of MIC@R NoC for real-time applications. Int. J. Comput. Aided Eng. Technol. 2(2/3): 274-293 (2010) - [j6]Zeghid Medien, Mohsen Machhout, Belgacem Bouallegue, Lazhar Khriji, Adel Baganne, Rached Tourki:
Design and Hardware Implementation of QoSS - AES Processor for Multimedia applications. Trans. Data Priv. 3(1): 43-64 (2010)
2000 – 2009
- 2009
- [j5]Mounir Zid, Abdelkrim Zitouni, Adel Baganne, Rached Tourki:
Nouvelles architectures génériques de NoC. Tech. Sci. Informatiques 28(1): 101-133 (2009) - 2007
- [j4]Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin:
Constrained algorithmic IP design for system-on-chip. Integr. 40(2): 94-105 (2007) - [c13]Zeghid Medien, Belgacem Bouallegue, Adel Baganne, Mohsen Machhout, Rached Tourki:
A Reconfigurable Implementation of the New Secure Hash Algorithm. ARES 2007: 281-285 - [c12]Rafik Ben-Tekaya, Adel Baganne, Rached Tourki:
MIC@R : A Generic Low Latency Router for On-Chip Networks. ICECS 2007: 999-1002 - 2006
- [j3]Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin:
A formal method for hardware IP design and integration under I/O and timing constraints. ACM Trans. Embed. Comput. Syst. 5(1): 29-53 (2006) - 2004
- [j2]Mehrez Marzougui, Mohamed Abid, Adel Baganne, Rached Tourki:
Co-simulation and communication synthesis approach for intellectual properties based SoCs. Comput. Electr. Eng. 30(5): 361-381 (2004) - [c11]Philippe Coussy, David Gnaedig, Amor Nafkha, Adel Baganne, Emmanuel Boutillon, Eric Martin:
A methodology for IP integration into DSP SoC: a case study of a MAP algorithm for turbo decoder. ICASSP (5) 2004: 45-48 - 2003
- [c10]Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Riadh Gaiech, Eric Martin:
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration. DATE 2003: 20250-20255 - [c9]Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Eric Martin:
A simulation based approach for incorporating virtual components IP cores into multimedia systems design. ICASSP (2) 2003: 525-528 - [c8]Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Eric Martin:
A simulation based approach for incorporating virtual components IP cores into multimedia systems design. ICME 2003: 817-820 - [c7]Philippe Coussy, Adel Baganne, Eric Martin:
Communication and Timing Constraints Analysis for IP Design and Integration. VLSI-SOC 2003: 38-43 - 2002
- [c6]Philippe Coussy, Adel Baganne, Eric Martin:
A design methodology for integrating IP into SOC systems. CICC 2002: 307-310 - [c5]Philippe Coussy, Adel Baganne, Eric Martin:
IP cores integration in DSP System-on-chip designs. EUSIPCO 2002: 1-4 - [c4]Philippe Coussy, Adel Baganne, Eric Martin:
Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder. ICECS 2002: 733-736 - [c3]Philippe Coussy, Adel Baganne, Eric Martin:
A design methodology for IP integration. ISCAS (4) 2002: 711-714
1990 – 1999
- 1999
- [j1]Adel Baganne, Jean Luc Philippe, Eric Martin:
A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller. J. VLSI Signal Process. 22(1): 21-29 (1999) - [c2]S. Gailhard, Nathalie Julien, Adel Baganne, Eric Martin:
Low Power Design of an Acoustic Echo Canceller Gmdf a Algorithm on Dedicated VLSI Architectures. Great Lakes Symposium on VLSI 1999: 334-335 - 1997
- [c1]Adel Baganne, Jean Luc Philippe, Eric Martin:
Hardware interface design for real time embedded systems. Great Lakes Symposium on VLSI 1997: 58-63
Coauthor Index
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