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ORCIDChaudhry Indra Kumar
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2020 – today
- 2024
[j7]Chaudhry Indra Kumar
, Abhishek Chaudhary, Shreyansh Upadhyaya:
Design of high performance energy efficient CMOS voltage level shifter for mixed signal circuits applications. Integr. 95: 102133 (2024)- [c6]Promit Mandal, Prince Kumar, Saarthak Vijay Singh, Chaudhry Indra Kumar:
A Radiation-Hardened Double Node Upset Latch Design for Nanoscale CMOS Technologies. COMPENG 2024: 1-5 - [c5]Ananya Kapoor, Ayush Thapar, Chaitanya Shanker Jha, Chaudhry Indra Kumar:
A High Performance and Low Power Subthreshold Voltage Level Shifter Design. VLSID 2024: 623-627 - 2022
- [j6]Raghav Shekhar, Chaudhry Indra Kumar:
Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications. Integr. 87: 176-181 (2022) - [j5]Chaudhry Indra Kumar:
An Energy-Efficient Low-Area Double-Node-Upset-Hardened Latch Design. J. Circuits Syst. Comput. 31(7): 2250125:1-2250125:16 (2022) - [j4]Dinesh Kushwaha, Ashish Joshi, Chaudhry Indra Kumar, Neha Gupta, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu:
An Energy-Efficient High CSNR XNOR and Accumulation Scheme for BNN. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2311-2315 (2022)
2010 – 2019
- 2019
- [j3]Chaudhry Indra Kumar, Anand Bulusu:
High performance energy efficient radiation hardened latch for low voltage applications. Integr. 66: 119-127 (2019) - [j2]Chaudhry Indra Kumar, Arvind Kumar Sharma, Rajendra Partap, Anand Bulusu:
An energy-efficient variation aware self-correcting latch. Microelectron. J. 84: 67-78 (2019) - [j1]Chaudhry Indra Kumar, Ishant Bhatia, Arvind Kumar Sharma, Deep Sehgal, H. S. Jatana, Anand Bulusu:
A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches. IEEE Trans. Very Large Scale Integr. Syst. 27(9): 2170-2179 (2019) - 2018
- [c4]Chaudhry Indra Kumar, Anand Bulusu:
Design and Analysis of Energy Efficient Self Correcting Latches considering Metastability. PRIME 2018: 101-104 - 2016
- [c3]Chaudhry Indra Kumar, Arvind Kumar Sharma, Sandeep Miryala, Anand Bulusu:
A novel energy-efficient self-correcting methodology employing INWE. SMACD 2016: 1-4 - 2011
- [c2]Manisha Pattanaik, Shashank Parashar, Chaudhry Indra Kumar, Akanksha Chouhan, Vikas Mahor:
A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique. ISED 2011: 118-123 - [c1]Shashank Parashar, Chaudhry Indra Kumar, Manisha Pattanaik:
An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance. ISVLSI 2011: 49-53
Coauthor Index
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