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ORCIDSamiha Mourad
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Journal Articles
- 2012
[j15]Agustin Laprovitta, Gabriela Peretti
, Eduardo Romero, Samiha Mourad:
A low-cost configurability test strategy for an embedded analog circuit. Microelectron. J. 43(11): 745-755 (2012)- 2010
- [j14]Taweesak Reungpeerakul, Douglas Kay, Samiha Mourad:
Partial-Matching Technique in a Mixed-Mode BIST Environment. IEEE Trans. Instrum. Meas. 59(4): 970-977 (2010) - 2008
- [j13]Miguel Eduardo Litvin, Samiha Mourad:
Wave Pipelining Using Self Reset Logic. VLSI Design 2008: 738983:1-738983:6 (2008) - 2006
- [j12]Zemo Yang, Samiha Mourad:
Crosstalk Induced Fault Analysis and Test in DRAMs. J. Electron. Test. 22(2): 173-187 (2006) - 2005
- [j11]Douglas Kay, Sung Chung, Samiha Mourad:
Embedded test control schemes using iBIST for SOCs. IEEE Trans. Instrum. Meas. 54(3): 956-964 (2005) - [j10]Miguel Eduardo Litvin, Samiha Mourad:
Self-reset logic for fast arithmetic applications. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 462-475 (2005) - [j9]Tom Egan, Samiha Mourad:
Design-for-testability for embedded delay-locked loops. IEEE Trans. Very Large Scale Integr. Syst. 13(8): 984-988 (2005) - 2004
- [j8]San L. Lin, Samiha Mourad:
On-chip rise-time measurement. IEEE Trans. Instrum. Meas. 53(6): 1510-1516 (2004) - 2003
- [j7]San L. Lin, Shoba Krishnan, Samiha Mourad:
A self-binning BIST structure for data communications transceivers. IEEE Trans. Instrum. Meas. 52(5): 1399-1407 (2003) - 2002
- [j6]Bruce S. Greene, Samiha Mourad:
Partial Scan Testing on the Register-Transfer Level. J. Electron. Test. 18(6): 613-626 (2002) - [j5]Thomas Egan, Samiha Mourad:
A framework for the characterization and verification of embedded phase-locked loops. IEEE Trans. Instrum. Meas. 51(6): 1234-1239 (2002) - 2001
- [j4]Xiaomei Liu, Prachi Sathe, Samiha Mourad:
Effect of Reverse Body Bias on Current Testing of 0.18 μm Gates. VLSI Design 12(4): 501-513 (2001) - 1993
- [j3]Samiha Mourad:
Computer-Aided Testing Systems: Evaluation and Benchmark Circuits. VLSI Design 1(1): 87-97 (1993) - 1988
- [j2]Edward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner:
Probability models for pseudorandom test sequences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1): 68-74 (1988) - 1987
- [j1]Samiha Mourad, Dorothy Andrews:
On the Reliability of the IBM MVS/XA Operating. IEEE Trans. Software Eng. 13(10): 1135-1139 (1987)
Conference and Workshop Papers
- 2010
- [c26]Tezaswi Raja, Samiha Mourad:
Digital Logic Implementation in Memristor-Based Crossbars - A Tutorial. DELTA 2010: 303-309 - 2006
- [c25]Taweesak Reungpeerakul, Xiaoshu Qian, Samiha Mourad:
BCH-based Compactors of Test Responses with Controllable Masks. ATS 2006: 395-401 - [c24]Miguel Eduardo Litvin, Samiha Mourad, William Terry, Janice Terry:
Wave Pipelining using Self Reset Logic. ICECS 2006: 1280-1283 - 2004
- [c23]Zemo Yang, Samiha Mourad:
Crosstalk induced fault analysis in DRAMs. SoCC 2004: 171-172 - 2002
- [c22]Douglas Kay, Sung Chung, Samiha Mourad:
Embedded test control schemes for compression in SOCs. DAC 2002: 679-684 - [c21]Mary Sue Haydt, Samiha Mourad, William Terry, Janice Terry:
A new model for metastability. ICECS 2002: 413-416 - [c20]San Lin, Samiha Mourad:
Embedded testing for data communications circuits. ICECS 2002: 467-470 - 2001
- [c19]San Lin, Samiha Mourad, Shoba Krishnan:
At-speed testing of data communications transceivers. ISCAS (4) 2001: 9-12 - [c18]Tom Egan, Samiha Mourad:
Verification of Embedded Phase-Locked Loops. ISQED 2001: 290-295 - [c17]Douglas Kay, Samiha Mourad:
Compression Technique for Interactive BIST Application. VTS 2001: 9-14 - 2000
- [c16]Xiaomei Liu, Samiha Mourad:
Performance of submicron CMOS devices and gates with substrate biasing. ISCAS 2000: 9-12 - [c15]Zemo Yang, Samiha Mourad:
Crosstalk in Deep Submicron DRAMs. MTDT 2000: 125-130 - 1999
- [c14]Samiha Mourad, Bruce S. Greene:
Scan-path based testing of systems on a chip. ICECS 1999: 1081-1084 - 1996
- [c13]Samiha Mourad:
Digital design with minimal number of scan flip-flops. ICECS 1996: 931-934 - 1994
- [c12]Faisal Haq, Samiha Mourad:
Optimal Logic Blocks for FPGAs, using Factorial Design Techniques. ICCD 1994: 470-474 - [c11]Mary Sue Haydt, Robert Owens, Samiha Mourad:
Modeling the Effect of Ground Bounce on Noise Margin. ITC 1994: 279-285 - [c10]C.-J. Chen, Samiha Mourad:
Gate-to-channel shorts in BiCMOS logic gates. VTS 1994: 440-445 - 1992
- [c9]Samiha Mourad:
Benchmarking Array Comparators. VLSI Design 1992: 362-363 - 1990
- [c8]Samiha Mourad:
Sequential circuit testing. Compcon 1990: 449-454 - 1988
- [c7]Takashi Nanya, Samiha Mourad, Edward J. McCluskey:
Multiple stuck-at fault testability of self-testing checkers. FTCS 1988: 381-386 - [c6]Samiha Mourad:
Digital Testing, Theory and Practice. ITC 1988: 205-206 - [c5]Samiha Mourad, Edward J. McCluskey:
On Benchmarking Digital Testing Systems. ITC 1988: 997 - 1986
- [c4]Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey:
Multiple Fault Detection in Parity Trees. COMPCON 1986: 441-444 - [c3]Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey:
Stuck-At Fault Detection in Parity Trees. FJCC 1986: 836-840 - 1985
- [c2]Joseph L. A. Hughes, Samiha Mourad, Edward J. McCluskey:
An Experimental Study Comparing 74LS181 Test Sets. COMPCON 1985: 384-387 - 1980
- [c1]Samiha Mourad:
An optimized ATPG. DAC 1980: 381-385
Coauthor Index
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