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Books and Theses
- 1996
[b1]Winfried Gehrke:
Assoziatives Controlling von programmierbaren Parallelprozessoren für die Videosignalverarbeitung. University of Hanover, Hannover, Germany, VDI-Verlag 1996, ISBN 978-3-18-343010-9, pp. 1-167
Journal Articles
- 2005
- [j2]Wido Kruijtzer, Víctor Reyes, Winfried Gehrke:
Design, synthesis and verification of a smart imaging core using SystemC. Des. Autom. Embed. Syst. 10(2-3): 127-155 (2005) - 1995
- [j1]Winfried Gehrke, Klaus Gaedke:
Associative controlling of monolithic parallel processor architectures. IEEE Trans. Circuits Syst. Video Technol. 5(5): 453-464 (1995)
Conference and Workshop Papers
- 2007
- [c7]Norman Nolte, Winfried Gehrke, Frank Wiczinowski, Peter Pirsch:
Scalable Multi-Standard LSI Texture Encoder for MPEG and VC-1 Video Compression. ICME 2007: 1187-1190 - 2006
- [c6]Sebastian Flügel, Heiko Klußmann, Peter Pirsch, Marco Schulz, Malik Cisse, Winfried Gehrke:
A Highly Parallel Sub-Pel Accurate Motion Estimator for H.264. MMSP 2006: 387-390 - 2005
- [c5]Wido Kruijtzer, Winfried Gehrke, Víctor Reyes, Ghiath Alkadi, Thomas Hinz, Jörn Jachalsky, Bruno Steux:
The design of a smart imaging core for automotive and consumer applications: a case study. CODES+ISSS 2005: 124-129 - 2003
- [c4]Jörn Jachalsky, Martin Wahler, Peter Pirsch, S. Capperon, Winfried Gehrke, W. M. Kruijtzer, Antonio Núñez
:
A core for ambient and mobile intelligent imaging applications. ICME 2003: 1-4 - 2002
- [c3]Jörn Jachalsky, M. Wahle, Peter Pirsch, Winfried Gehrke:
A flexible, fully configurable architecture for MPEG-2 video encoding. ICECS 2002: 1063-1066 - 1994
- [c2]Winfried Gehrke, Richard Hoffer, Peter Pirsch:
A hierarchical multiprocessor architecture based on heterogeneous processors for video coding applications. ICASSP (2) 1994: 413-416 - 1993
- [c1]Peter Pirsch, Winfried Gehrke, Richard Hoffer:
A Hierarchical Multiprocessor Achitecture for Video Coding Applications. ISCAS 1993: 1750-1753
Coauthor Index
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