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ORCIDNavakanta Bhat
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Journal Articles
- 2016
[j12]Aditya Sankar Medury, K. N. Bhat, Navakanta Bhat:
Impact of carrier quantum confinement on the short channel effects of double-gate silicon-on-insulator FINFETs. Microelectron. J. 55: 143-151 (2016)- 2012
- [j11]Pramod Murali, Ranjit K., Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K. N. Bhat, Praveen C. Ramamurthy
:
A CMOS Gas Sensor Array Platform With Fourier Transform Based Impedance Spectroscopy. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(11): 2507-2517 (2012) - 2011
- [j10]Rakesh Gnana David Jeyasingh, Navakanta Bhat, Bharadwaj S. Amrutur:
Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique. IEEE Trans. Very Large Scale Integr. Syst. 19(2): 295-304 (2011) - 2009
- [j9]Balaji Jayaraman, Navakanta Bhat:
Performance Analysis of Subthreshold Cascode Current Mirror in 130 nm CMOS Technology. J. Low Power Electron. 5(4): 484-496 (2009) - [j8]Shobi Bagga, Navakanta Bhat, S. Mohan:
LPG Gas-Sensing System With hbox SnO2 Thin-Film Transducer and 0.7- $\mu\hbox {m}$ CMOS Signal Conditioning ASIC. IEEE Trans. Instrum. Meas. 58(10): 3653-3658 (2009) - 2008
- [j7]R. Srinivasan, Navakanta Bhat:
Optimisation of Gate-Drain/Source Overlap in 90 nm NMOSFETs for Low Noise Amplifier Performance. J. Low Power Electron. 4(2): 240-246 (2008) - [j6]B. P. Harish, Navakanta Bhat, Mahesh B. Patil:
Hybrid-CV Modeling for Estimating the Variability in Dynamic Power. J. Low Power Electron. 4(3): 263-274 (2008) - 2007
- [j5]B. P. Harish, Navakanta Bhat, Mahesh B. Patil:
On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Surface Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3): 606-614 (2007) - 2005
- [j4]Amit K. Gupta, Navakanta Bhat:
Asymmetric cross-coupled differential pair configuration to realize neuron activation function and its derivative. IEEE Trans. Circuits Syst. II Express Briefs 52-II(1): 10-13 (2005) - 2003
- [j3]C. Venkatesh, Shashidhar Pati, Navakanta Bhat:
Torsional Mems Varactor With Low Actuation Voltage. Int. J. Comput. Eng. Sci. 4(3): 555-558 (2003) - [j2]Shashidhar Pati, C. Venkatesh, Navakanta Bhat, Rudra Pratap:
Voltage Controlled Oscillator Using Tunable Mems Resonator. Int. J. Comput. Eng. Sci. 4(3): 675-678 (2003) - [j1]H. C. Srinivasaiah, Navakanta Bhat:
Mixed-mode simulation approach to characterize the circuit delay sensitivity to implant dose variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6): 742-747 (2003)
Conference and Workshop Papers
- 2023
- [c31]Sooraj Sanjay, Navakanta Bhat:
Super-Nernstian ISFET Using Scaled Coplanar Multi-Gated Channels. SENSORS 2023: 1-4 - [c30]Ananya Tiwari, Sooraj Sanjay, Navakanta Bhat:
Super-Nernstian Floating-Extended Gate Ion Sensitive Field Effect Transistor for pH sensing. SENSORS 2023: 1-4 - 2020
- [c29]Aashi Gupta, Neha Sakhuja, Ravindra Jha, Navakanta Bhat:
Giant Humidity Responsiveness of Platinum Functionalized WS2 Nanosheet Based Chemiresistors. IEEE SENSORS 2020: 1-4 - 2019
- [c28]Sujoy Ghosh, Anujay Ghosh, Nived Kodavali, Chandra Shekhar Prajapati, Navakanta Bhat:
A baseline correction model for humidity and temperature compensationWO3 film based sensor for NO2 detection. IEEE SENSORS 2019: 1-4 - [c27]Chandra Shekhar Prajapati, Sridar M. I., Samatha Benedict, Sujoy Ghosh, Navakanta Bhat:
Activate Zeolite Filter: A gas sensor signal stabilization and enhancement. IEEE SENSORS 2019: 1-4 - 2018
- [c26]Shubhadeep Bhattacharjee, Pranandita Biswas, Swan Solanke, Rangarajan Muralidharan, Digbijoy Nath, Navakanta Bhat:
Optoelectronics based on Vertical Transport in Multi-layer MoS2. DRC 2018: 1-2 - [c25]Shubhadeep Bhattacharjee, K. L. Ganapathi, S. Mohan, Navakanta Bhat:
High Performance, Sub-thermionic MoS2 Transistors using Tunable Schottky Contacts. DRC 2018: 1-2 - [c24]Vinay Kumar, Navakanta Bhat:
anuPath™: Novel Sensing Chemistry to Lab on Palm Sensor System for Diabetes and its Complications. IEEE SENSORS 2018: 1-4 - [c23]Chandra Shekhar Prajapati, Navakanta Bhat:
Growth Optimization, Morphological, Electrical and Sensing Characterization of V2O5 Films for SO2Sensor Chip. IEEE SENSORS 2018: 1-4 - [c22]Neha Sakhuja, Ravindra Jha, Navakanta Bhat:
Ppb-Level Ammonia Detection by Exfoliated WS2 Based Chemiresistive Sensors for Breath Analysis. IEEE SENSORS 2018: 1-4 - 2017
- [c21]Saloni Chaurasia, Prosenjit Sen, Navakanta Bhat:
Using dielectric droplets to improve sensitivity of capacitive sensors suitable for tactile sensing. NEMS 2017: 422-425 - [c20]Bhawani Shankar, Ankit Soni, Manikant Singh, Rohith Soman, K. N. Bhat, Srinivasan Raghavan, Navakanta Bhat, Mayank Shrivastava:
ESD Behavior of AlGaN/GaN HEMT on Si: Physical Insights, Design Aspects, Cumulative Degradation and Failure Analysis. VLSID 2017: 361-365 - 2016
- [c19]Suraj Hebbar, Vinay Kumar, M. S. Bhat, Navakanta Bhat:
Smart handheld platform for electrochemical bio sensors. VDAT 2016: 1-2 - 2014
- [c18]Revathy Padmanabhan, Navakanta Bhat, Yuichiro Morozumi, S. Mohan, Sanjeev Kaushal:
High-performance stacked TiO2-ZrO2 and Si-doped ZrO2 metal-insulator-metal capacitors. ICICDT 2014: 1-4 - [c17]A. V. S. S. Prasad, K. P. Venkatesh, Rudra Pratap, Navakanta Bhat:
Improved Design Methodology for the Development of Electrically Actuated MEMS Structures. VLSID 2014: 499-503 - 2012
- [c16]Pramod Murali, Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K. N. Bhat, Praveen C. Ramamurthy:
CMOS Gas Sensor Array Platform with Fourier Transform Based Impedance Spectroscopy. VLSI Design 2012: 173-178 - 2011
- [c15]Siva Rama Krishna V., Bharadwaj Amrutur, Navakanta Bhat, Chakra Pani K., Sampath Srinivasan:
Detection of Glycated Hemoglobin using 3-Aminophenylboronic Acid Modified Graphene Oxide. BIODEVICES 2011: 109-113 - [c14]Satyam Dwivedi, Bharadwaj Amrutur, Navakanta Bhat:
Power Scalable Digital Baseband Architecture for IEEE 802.15.4. VLSI Design 2011: 30-35 - 2009
- [c13]B. P. Harish, Navakanta Bhat, Mahesh B. Patil:
Bridging Technology-CAD and Design-CAD for Variability Aware Nano-CMOS Circuits. ISCAS 2009: 2309-2312 - 2008
- [c12]Sukumar Jairam, Kusum Lata, Subir K. Roy, Navakanta Bhat:
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches. ICECS 2008: 910-913 - [c11]Rakesh Gnana David Jeyasingh, Navakanta Bhat:
A low power, process invariant keeper for high speed dynamic logic circuits. ISCAS 2008: 1668-1671 - [c10]Kannan Aryaperumal Sankaragomathi, Manodipan Sahoo, Satyam Dwivedi, Bharadwaj S. Amrutur, Navakanta Bhat:
Optimal power and noise allocation for analog and digital sections of a low power radio receiver. ISLPED 2008: 271-276 - [c9]Sukumar Jairam, Navakanta Bhat:
GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes. VLSI Design 2008: 589-594 - 2007
- [c8]B. P. Harish, Navakanta Bhat, Mahesh B. Patil:
Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs. ICCTA 2007: 94-98 - [c7]Balaji Jayaraman, Navakanta Bhat:
High Precision 16-bit Readout Gas Sensor Interface in 0.13µm CMOS. ISCAS 2007: 3071-3074 - [c6]Srimoyee Sen, Urmimala Roy, Chaitanya Kshirsagar, Navakanta Bhat, Chandan Kumar Sarkar:
Circuit prospects of DGFET: Variable gain differential amplifier an a schmitt trigger with adjustable hysteresis. VLSI-SoC 2007: 280-283 - 2005
- [c5]R. Srinivasan, Navakanta Bhat:
Impact of Channel Engineering on Unity Gain Frequency and Noise-Figure in 90nm NMOS Transistor for RF Applications. VLSI Design 2005: 392-396 - 2004
- [c4]H. C. Srinivasaiah, Navakanta Bhat:
Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment. VLSI Design 2004: 285-290 - [c3]Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap:
A Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework. VLSI Design 2004: 642-645 - 2003
- [c2]R. Srinivasan, Navakanta Bhat:
Effect of Scaling on the Non-quasi-static Behaviour of the MOSFET for RF IC's. VLSI Design 2003: 105-109 - 2002
- [c1]H. C. Srinivasaiah, Navakanta Bhat:
Implant Dose Sensitivity of 0.1µm CMOS Inverter Delay. ASP-DAC/VLSI Design 2002: 225-
Informal and Other Publications
- 2023
- [i1]Ankit Rao, Sooraj Sanjay, Majid Ahmadi, Anirudh Venugopalrao, Navakanta Bhat, Bart Kooi, Srinivasan Raghavan, Pavan Nukala:
Self-assembled neuromorphic networks at self-organized criticality in Ag-hBN platform. CoRR abs/2301.01619 (2023)
Coauthor Index
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