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ORCIDWalter Guggenbühl
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1990 – 1999
- 1995
[j7]Urs A. Müller, Anton Gunzinger, Walter Guggenbühl:
Fast neural net simulation with a DSP processor array. IEEE Trans. Neural Networks 6(1): 203-213 (1995)- 1994
- [j6]Walter Guggenbühl, Jiandong Di, Josef Goette:
Switched-current memory circuits for high-precision applications. IEEE J. Solid State Circuits 29(9): 1108-1116 (1994) - 1993
- [j5]Markus Zeltner, Bruno Schneuwly, Walter Guggenbühl:
How to program and configure a heterogeneous multiprocessor. Mach. Vis. Appl. 7(1): 30-36 (1993) - [j4]Marcel Jacomet, Walter Guggenbühl:
Layout-dependent fault analysis and test synthesis for CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(6): 888-899 (1993) - [c10]Urs A. Müller, Anton Gunzinger, Walter Guggenbühl:
Neural net simulation with MUSIC. ICNN 1993: 1737-1741 - 1992
- [j3]Urs A. Müller, Bernhard Bäumle, Peter Kohler, Anton Gunzinger, Walter Guggenbühl:
Achieving supercomputer performane for neural net simulation with an array of digital signal processors. IEEE Micro 12(5): 55-65 (1992) - [j2]Jerzy B. Lont, Walter Guggenbühl:
Analog CMOS implementation of a multilayer perceptron with nonlinear synapses. IEEE Trans. Neural Networks 3(3): 457-465 (1992) - [c9]Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Walter Guggenbühl:
Architecture and realization of a multi signal processor system. ASAP 1992: 327-340 - [c8]Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Johann vonder Mühll, Florian Müller-Plathe, Wilfred F. van Gunsteren, Walter Guggenbühl:
Achieving Super Computer Performance with a DSP Array Processor. SC 1992: 543-550 - 1991
- [j1]Walter Guggenbühl, Guy Morbach, Michael Schaller:
Simulation lossless symmetrical three conductor systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(7): 904-910 (1991) - [c7]Peter Schaeren, Bruno Schneuwly, Walter Guggenbühl:
3D Scene Acquisition by Motion Induced Stereo. DAGM-Symposium 1991: 552-559 - 1990
- [c6]D. Stokar, Anton Gunzinger, Walter Guggenbühl, Edi Hiltebrand, Severin Mathis, Peter Schaeren, Bruno Schneuwly, Markus Zeltner:
SYDAMA II: A Heterogeneous Multiprocessor System for Real Time Image Processing. CONPAR 1990: 365-373 - [c5]Anton Gunzinger, Severin Mathis, Walter Guggenbühl:
The synchronous dataflow machine: a computer architecture for real time image processing. ICPR (2) 1990: 436-441
1980 – 1989
- 1989
- [c4]Anton Gunzinger, Severin Mathis, Walter Guggenbühl:
The SYnchronous DAtaflow MAchine: Architecture and Performance. PARLE (1) 1989: 85-99 - 1988
- [c3]Anton Gunzinger, Severin Mathis, Walter Guggenbühl:
Datenflussrechner zur Echtzeitbildverarbeitung: Anwendungen. DAGM-Symposium 1988: 76-82 - [c2]Anton Gunzinger, Severin Mathis, Walter Guggenbühl:
A reconfigurable systolic array for real-time image processing. ICASSP 1988: 2057-2060 - 1987
- [c1]Anton Gunzinger, Severin Mathis, Walter Guggenbühl:
Datenflußrechner zur Echtzeitbildverarbeitung: Softwareentwicklungsumgebung. DAGM-Symposium 1987: 34-39
Coauthor Index
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