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2020 – today
- 2024
[c8]Shu-Ting Wang, Hanyang Xu, Amin Mamandipoor, Rohan Mahapatra, Byung Hoon Ahn, Soroush Ghodrati, Krishnan Kailas, Mohammad Alian, Hadi Esmaeilzadeh:
Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators. HPCA 2024: 1043-1062- [c7]Shashank Nag, Zachary Susskind, Aman Arora, Alan T. L. Bacellar, Diego L. C. Dutra, Igor D. S. Miranda, Krishnan Kailas, Eugene B. John, Maurício Breternitz, Priscila M. V. Lima, Felipe M. G. França, Lizy K. John:
LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA. MWSCAS 2024: 1206-1211 - [i1]Shashank Nag, Alan T. L. Bacellar, Zachary Susskind, Anshul Jha, Logan Liberty, Aishwarya Sivakumar, Eugene B. John, Krishnan Kailas, Priscila M. V. Lima, Neeraja J. Yadwadkar, Felipe M. G. França, Lizy K. John:
Shrinking the Giant : Quasi-Weightless Transformers for Low Energy Inference. CoRR abs/2411.01818 (2024)
2010 – 2019
- 2019
- [j2]Matthew M. Ziegler
, Krishnan Kailas, Xin Zhang, Rajiv V. Joshi:
Research From the IEEE IBM AI Compute and Emerging Technology Symposia. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(3): 435-438 (2019) - 2014
- [c6]Philip G. Emma, Alper Buyuktosunoglu, Michael B. Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime H. Moreno, Eren Kursun:
3D stacking of high-performance processors. HPCA 2014: 500-511
2000 – 2009
- 2009
- [c5]Krishnan Kailas, Viresh Paruthi, Brian Monwai:
Formal verification of correctness and performance of random priority-based arbiters. FMCAD 2009: 101-107 - 2005
- [c4]Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan Kailas:
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance. Information Hiding 2005: 357-371 - 2003
- [j1]Jaime H. Moreno, Victor V. Zyuban, Uzi Shvadron, Fredy D. Neeser, Jeff H. Derby, Malcolm S. Ware, Krishnan Kailas, Ayal Zaks, Amir B. Geva, Shay Ben-David, Sameh W. Asaad, Thomas W. Fox, Daniel Littrell, Marina Biberstein, Dorit Naishlos, Hillery C. Hunter:
An innovative low-power high-performance programmable signal processor for digital communications. IBM J. Res. Dev. 47(2-3): 299-326 (2003) - 2002
- [c3]Krishnan Kailas, Manoj Franklin, Kemal Ebcioglu:
A Register File Architecture and Compilation Scheme for Clustered ILP Processors. Euro-Par 2002: 500-511 - 2001
- [c2]Krishnan Kailas, Kemal Ebcioglu, Ashok K. Agrawala:
CARS: A New Code Generation Framework for Clustered ILP Processors. HPCA 2001: 133-143
1990 – 1999
- 1998
- [c1]Kemal Ebcioglu, Jason Fritts, Stephen Kosonocky, Michael Gschwind, Erik R. Altman, Krishnan Kailas, Terry Bright:
An eight-issue tree-VLIW processor for dynamic binary translation. ICCD 1998: 488-495
Coauthor Index
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