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ORCIDParijat Mukherjee
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2020 – today
- 2024
[j5]Arvind K. Sharma
, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar:
Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(12): 4373-4385 (2024)- 2022
- [j4]Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Mining Patterns From Concurrent Execution Traces. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2758-2762 (2022) - 2021
- [j3]Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar:
ALIGN: A System for Automating Analog Layout. IEEE Des. Test 38(2): 8-18 (2021) - [c12]Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Parijat Mukherjee, Soner Yaldiz, Ramesh Harjani, Sachin S. Sapatnekar:
Common-Centroid Layouts for Analog Circuits: Advantages and Limitations. DATE 2021: 1224-1229 - [c11]Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar:
Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. ICCAD 2021: 1-9 - [c10]Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Model Synthesis for Communication Traces of System Designs. ICCD 2021: 492-499 - [c9]Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar:
Machine Learning Techniques in Analog Layout Automation. ISPD 2021: 71-72 - [c8]Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Mining Message Flows from System-on-Chip Execution Traces. ISQED 2021: 374-380 - [c7]Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
A Comparative Study of Specification Mining Methods for SoC Communication Traces. ISVLSI 2021: 31-36 - [i4]Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Model Synthesis for Communication Traces of System-on-Chip Designs. CoRR abs/2102.06989 (2021) - 2020
- [c6]Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar:
The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk). ICCAD 2020: 54:1-54:2 - [c5]Kishor Kunal, Tonmoy Dhar, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Sachin S. Sapatnekar:
Learning from Experience: Applying ML to Analog Circuit Design. ISPD 2020: 55 - [c4]Yuting Cao, Parijat Mukherjee, Mahesh Ketkar, Jin Yang, Hao Zheng:
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs. ISQED 2020: 389-394 - [i3]Yuting Cao, Parijat Mukherjee, Mahesh Ketkar, Jin Yang, Hao Zheng:
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs. CoRR abs/2005.01574 (2020) - [i2]Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Mining Message Flows from System-on-Chip Execution Traces. CoRR abs/2005.11221 (2020) - [i1]Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Sachin S. Sapatnekar, Soner Yaldiz:
ALIGN: A System for Automating Analog Layout. CoRR abs/2008.10682 (2020)
2010 – 2019
- 2016
- [j2]Parijat Mukherjee, Peng Li:
Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits. IEEE Des. Test 33(5): 28-34 (2016) - 2014
- [c3]Parijat Mukherjee, Peng Li:
Leveraging pre-silicon data to diagnose out-of-specification failures in mixed-signal circuits. DAC 2014: 9:1-9:6 - [c2]Parijat Mukherjee, Chirayu S. Amin, Peng Li:
Approximate property checking of mixed-signal circuits. DAC 2014: 115:1-115:6 - 2012
- [j1]Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li:
Efficient Identification of Unstable Loops in Large Linear Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1332-1345 (2012) - 2011
- [c1]Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li:
Automatic stability checking for large linear analog integrated circuits. DAC 2011: 304-309
Coauthor Index
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