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ORCIDRamakrishna Voorakaranam
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2000 – 2009
- 2007
[j1]Ramakrishna Voorakaranam, Selim Sermet Akbay, Soumendu Bhattacharya, Sasikumar Cherubal, Abhijit Chatterjee:
Signature Testing of Analog and RF Circuits: Algorithms and Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(5): 1018-1031 (2007)- 2004
- [c8]Sasikumar Cherubal, Ramakrishna Voorakaranam, Abhijit Chatterjee, John McLaughlin, Jason L. Smith, David M. Majernik:
Concurrent RF Test Using Optimized Modulated RF Stimuli. VLSI Design 2004: 1017-1022 - 2003
- [c7]Ramakrishna Voorakaranam, Randy Newby, Sasikumar Cherubal, Bob Cometta, Thomas Kuehl, David M. Majernik, Abhijit Chatterjee:
Production Deployment of a Fast Transient Testing Methodology for Analog Circuits : Case Study and Results. ITC 2003: 1174-1181 - 2002
- [c6]Ramakrishna Voorakaranam, Sasikumar Cherubal, Abhijit Chatterjee:
A Signature Test Framework for Rapid Production Testing of RF Circuits. DATE 2002: 186-191 - 2000
- [c5]Ramakrishna Voorakaranam, Abhijit Chatterjee:
Test Generation for Accurate Prediction of Analog Specifications. VTS 2000: 137-142
1990 – 1999
- 1999
- [c4]Ramakrishna Voorakaranam, Abhijit Chatterjee:
Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test. ARVLSI 1999: 342-357 - [c3]Ramakrishna Voorakaranam, Abhijit Chatterjee:
Hierarchical Test Generation for Analog Circuits Using Incremental Test Development. VTS 1999: 296-303 - 1998
- [c2]Alfred V. Gomes, Ramakrishna Voorakaranam, Abhijit Chatterjee:
Modular Fault Simulation of Mixed Signal Circuits with Fault Ranking by Severity. DFT 1998: 341-348 - 1997
- [c1]Ramakrishna Voorakaranam, Sudip Chakrabarti, Junwei Hou, Alfred V. Gomes, Sasikumar Cherubal, Abhijit Chatterjee, William H. Kao:
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis. ITC 1997: 903-912
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