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2020 – today
- 2023
[j2]Zelin Du
, Qianling Zhang, Mao Lin, Shiqing Li, Xin Li, Lei Ju:
A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1058-1071 (2023)- [j1]Wei Zhang, Qianling Zhang, Mingsong Lv, Songran Liu, Zimeng Zhou, Qiulin Chen, Nan Guan, Lei Ju:
Adaptive Task-Based Intermittent Computing System With Parallel State Backup. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 1798-1809 (2023)
2000 – 2009
- 2006
- [c9]Yibo Fan, Xiaoyang Zeng, Yu Yu, Gang Wang, Qianling Zhang:
A modified high-radix scalable Montgomery multiplier. ISCAS 2006 - 2005
- [c8]Bo Shen, Junhua Tian, Zheng Li, Jianing Su, Qianling Zhang:
A high performance QAM receiver for digital cable TV with integrated A/D and FEC decoder. ASP-DAC 2005: 1276-1279 - [c7]Junhua Tian, Bo Shen, Zheng Li, Jianing Su, Qianling Zhang:
Joint carrier recovery and adaptive equalization for high-order QAM. ISCAS (2) 2005: 928-931 - [c6]Yibo Fan, Xiaoyang Zeng, Zhang Zhang, Jun Chen, Qianling Zhang:
VLSI design of a high-speed RAS crypto-processor with reconfigurable architecture. ISSPA 2005: 307-310 - 2003
- [c5]Jiajing Wang, Qianling Zhang:
A 500-MHz low-power five-port CMOS register file. ASP-DAC 2003: 511-514 - [c4]Xinyu Wu, Zaiman Chen, Jinmei Lai, Qianling Zhang, Omar Wing, Junyan Ren:
Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation. ASP-DAC 2003: 885-890 - 2002
- [c3]Omar Wing, Tan Jun, Jinmei Lai, Junyan Ren, Qianling Zhang:
Iterative solution of ODE-PDE-AE systems for RF circuit simulation. ISCAS (4) 2002: 317-320 - 2000
- [c2]Fan Mo, Yihua Zhang, Jun Yu, Qianling Zhang:
An algorithm for VLSI implementation of highly efficient cubic-polynomial evaluation. ASP-DAC 2000: 13-14
1990 – 1999
- 1996
- [c1]Xuyun Chen, Ting Zhou, Qianling Zhang, Wei Li, Hao Min:
A VLSI architecture for discrete wavelet transform. ICIP (2) 1996: 1003-1006
Coauthor Index
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