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ORCIDNektarios Kranitis
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2020 – today
- 2024
[j15]Panagiotis Chatziantoniou
, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
A Parallel Architecture and Implementation for Near-Lossless Hyperspectral Image Compression Based on CCSDS 123.0-B-2 With Scalable Data-Rate Performance. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1616-1629 (2024)- 2022
- [j14]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis, Elias Machairas, Antonios Paschalis:
Efficient Hardware Architectures and Implementations of Packet-Level Erasure Coding Schemes for High Data Rate Reliable Satellite Communications. IEEE Trans. Aerosp. Electron. Syst. 58(3): 2269-2280 (2022) - [j13]Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. IEEE Trans. Aerosp. Electron. Syst. 58(6): 5470-5482 (2022) - [c29]Antonis M. Paschalis, Panagiotis Chatziantoniou, Dimitris Theodoropoulos, Antonis Tsigkanos, Nektarios Kranitis:
High-Performance Hardware Accelerators for Next Generation On-Board Data Processing. VLSI-SoC 2022: 1-4 - [i1]Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. CoRR abs/2205.04123 (2022) - 2021
- [j12]Antonis Tsigkanos, Nektarios Kranitis, George Theodorou, Antonis M. Paschalis:
A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA. IEEE Trans. Emerg. Top. Comput. 9(1): 90-103 (2021) - 2020
- [j11]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis:
Efficient Architectures for Multigigabit CCSDS LDPC Encoders. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1118-1127 (2020) - [j10]Antonis Tsigkanos, Nektarios Kranitis, Dimitris Theodoropoulos, Antonis M. Paschalis:
High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2397-2409 (2020) - [c28]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis:
Efficient LDPC Encoder Designs for Magnetic Recording Media. DFT 2020: 1-6
2010 – 2019
- 2019
- [c27]Ioannis Tsounis, Antonis Tsigkanos, Vasileios Vlagkoulis, Mihalis Psarakis, Nektarios Kranitis, Antonis M. Paschalis:
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA. AHS 2019: 17-24 - 2016
- [c26]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An efficient LDPC encoder architecture for space applications. IOLTS 2016: 149-154 - 2015
- [c25]Nektarios Kranitis, Antonis Tsigkanos, George Theodorou, Ioannis Sideris, Antonis M. Paschalis:
A single chip dependable and adaptable payload Data Processing Unit. IOLTS 2015: 138-143 - 2014
- [j9]Georgios Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Software-Based Self-Test for Small Caches in Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1991-2004 (2014) - [c24]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Power-aware optimization of software-based self-test for L1 caches in microprocessors. IOLTS 2014: 154-159 - [c23]Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo:
Dependable reconfigurable space systems: Challenges, new trends and case studies. IOLTS 2014: 222-227 - 2013
- [j8]Giorgos Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 786-790 (2013) - 2012
- [j7]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes. IEEE Trans. Dependable Secur. Comput. 9(1): 86-100 (2012) - [c22]George Theodorou, Serafeim Chatzopoulos, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A Software-Based Self-Test methodology for on-line testing of data TLBs. ETS 2012: 1 - 2011
- [c21]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A Software-Based Self-Test methodology for on-line testing of processor caches. ITC 2011: 1-10 - 2010
- [c20]Andreas Merentitis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis:
Energy optimal on-line Self-Test of microprocessors in WSN nodes. ICCD 2010: 376-383 - [c19]Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
SBST for on-line detection of hard faults in multiprocessor applications under energy constraints. IOLTS 2010: 62-67 - [c18]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A software-based self-test methodology for in-system testing of processor cache tag arrays. IOLTS 2010: 159-164
2000 – 2009
- 2008
- [j6]Nektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos:
Hybrid-SBST Methodology for Efficient Testing of Processor Cores. IEEE Des. Test Comput. 25(1): 64-75 (2008) - [c17]Andreas Merentitis, George Theodorou, Mihalis Giorgaras, Nektarios Kranitis:
Directed Random SBST Generation for On-Line Testing of Pipelined Processors. IOLTS 2008: 273-279 - [c16]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Low Energy On-Line SBST of Embedded Processors. ITC 2008: 1-10 - 2007
- [c15]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Selecting Power-Optimal SBST Routines for On-Line Processor Testing. ETS 2007: 111-116 - 2006
- [c14]Nektarios Kranitis, Andreas Merentitis, Nikolaos Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis:
Optimal periodic testing of intermittent faults in embedded pipelined processor applications. DATE 2006: 65-70 - [c13]P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis:
A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. IOLTS 2006: 235-241 - 2005
- [b1]Nektarios Kranitis:
Αποδοτικές τεχνικές ενσωματωμένης αυτοδοκιμής για επεξεργαστές τεχνολογίας CMOS VLSI βασισμένες στην αρχιτεκτονική του συνόλου εντολών. National and Kapodistrian University of Athens, Greece, 2005 - [j5]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis:
Software-Based Self-Testing of Embedded Processors. IEEE Trans. Computers 54(4): 461-475 (2005) - [j4]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis:
A concurrent built-in self-test architecture based on a self-testing RAM. IEEE Trans. Reliab. 54(1): 69-78 (2005) - 2003
- [j3]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. J. Electron. Test. 19(2): 103-112 (2003) - [c12]Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Low-Cost Software-Based Self-Testing of RISC Processor Cores. DATE 2003: 10714-10719 - [c11]George Xenoulis, Dimitris Gizopoulos, Nektarios Kranitis, Antonis M. Paschalis:
Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores. IOLTS 2003: 149- - [c10]Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. ITC 2003: 431-440 - 2002
- [c9]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Effective Software Self-Test Methodology for Processor Cores. DATE 2002: 592-597 - [c8]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. VTS 2002: 223-228 - 2001
- [j2]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian:
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. J. Electron. Test. 17(2): 97-107 (2001) - [c7]Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian:
Deterministic software-based self-testing of embedded processor cores. DATE 2001: 92-96 - [c6]Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. ISQED 2001: 343-349 - [c5]Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian:
Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. VTS 2001: 15-21 - 2000
- [j1]Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian:
Power-/Energy Efficient BIST Schemes for Processor Data Paths. IEEE Des. Test Comput. 17(4): 15-28 (2000) - [c4]Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Effective Low Power BIST for Datapaths. DATE 2000: 757 - [c3]Mihalis Psarakis, Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths. LATW 2000: 98-103 - [c2]Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Low Power/Energy BIST Scheme for Datapaths. VTS 2000: 23-28
1990 – 1999
- 1999
- [c1]Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian:
An Effective BIST Architecture for Fast Multiplier Cores. DATE 1999: 117-121
Coauthor Index
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last updated on 2024-09-10 02:06 CEST by the dblp team
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