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ORCIDZhikuang Cai
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2020 – today
- 2024
[j23]Zeheng Tao, Lei Wang, Chuanyang Sun, Xiang Wan, Xiaoyan Liu, Zhikuang Cai, Xiaojuan Lian:
Design of memristor-based combinational logic circuits. IEICE Electron. Express 21(3): 20230587 (2024)- [j22]Lin He, Hengzhuang Shi
, Junhui Zhang, Mingxiang Wei, Ping Wang, Shunming Li, Hao Gao, Zhikuang Cai:
A CMOS Current Sensing Interface With Sub-pA DC Uncertainty. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 508-512 (2024) - 2023
- [c6]Zhikuang Cai, Xin Wang, Zixuan Wang, Yunjin Yin, Wenjing Zhang, Tailong Xu, Yufeng Guo:
A 16MHz X0 with 17.5μs Startup Time Under 104ppm-ΔF Injection Using Automatic Phase-Error Correction Technique. ISSCC 2023: 66-67 - 2021
- [j21]Dezheng Zhu, Chao Chen, Yan Zhao, Chenglei Peng, Zhikuang Cai:
A 0.6V high-swing gate-switching charge pump for PLL with current self-matching technique in 28nm CMOS. IEICE Electron. Express 18(3): 20200441 (2021) - [j20]Zhikuang Cai, Boyang Cheng, Yuxuan Du, Xinchao Shang, Weiwei Shan:
A Time-Domain Binary CNN Engine With Error-Detection-Based Resilience in 28nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3177-3181 (2021) - [c5]Han Yang, Zeyu Zhao, Zhikuang Cai:
An optimized DFT technology based on machine learning. ITC-Asia 2021: 1-4 - 2020
- [j19]Dezheng Zhu, Yuxuan Wang, Chenglei Peng, Hongbing Pan, Zhikuang Cai:
A low-power 2.4-GHz receiver front-end with a complementary series feedback LNA and a current-reused passive down-converter based on gm-boosted TIA for WSN applications. IEICE Electron. Express 17(23): 20200353 (2020) - [j18]Shanwen Hu, Kaikai Xu, Yunqing Hu, Kejun Wu, Jinchao Qian, Yiting Gao, Dingzhou Song, Zixuan Wang, Bo Zhou, Zhikuang Cai, Yufeng Guo:
Design of a compact chip filter with two transmission zeros using 0.35 μm GaAs HBT. Microelectron. J. 95 (2020) - [c4]Ming Wang, Jian Xiao, Zhikuang Cai:
An effective technique preventing differential cryptanalysis attack. ATS 2020: 1-6
2010 – 2019
- 2019
- [j17]Chao Chen, Zhikuang Cai:
A 2.4 GHz 2.2 mW current reusing passive mixer with gm-boosted common-gate TIA in 180 nm CMOS. IEICE Electron. Express 16(2): 20181032 (2019) - [c3]Zhikuang Cai, Wenhua Lin, Xuanchen Qi, Jian Xiao:
Design of Low-Cost Ground Penetrating Radar Receiving Circuit Based on Equivalent Sampling. ISCAS 2019: 1-4 - [c2]Zhikuang Cai, Ying Wang, Shihuan Liu, Kai Lv, Zixuan Wang:
A Novel BIST Algorithm for Low-Voltage SRAM. ITC-Asia 2019: 133-138 - 2018
- [j16]Lanhua Xia, Jianhui Wu, Zhikuang Cai:
A self-refereed design-for-test structure of CP-PLL for on-chip jitter measurement. IEICE Electron. Express 15(4): 20171215 (2018) - [j15]Zhikuang Cai, Haobo Xu, Jian Xiao, Jun Yang:
An improved BIJM circuit based on undersampling technique. IEICE Electron. Express 15(8): 20180124 (2018) - [j14]Shanwen Hu, Shu Yu, Yunqing Hu, Zixuan Wang, Bo Zhou, Zhikuang Cai, Yufeng Guo:
A 0.2-6 GHz linearized Darlington-cascode broadband power amplifier. IEICE Electron. Express 15(8): 20180298 (2018) - [j13]Zhikuang Cai, Chao Chen:
A 0.6 V temperature-stable CMOS voltage reference circuit with sub-threshold voltage compensation technique. IEICE Electron. Express 15(18): 20180760 (2018) - [j12]Zixuan Wang, Hao Ding, Hao Xu, Cong Zhang, Shanwen Hu, Xincun Ji, Xiaojuan Xia, Zhikuang Cai:
An all-digital phase-locked loop with a PGTA-based TDC and a 0.6-V DCO. IEICE Electron. Express 15(22): 20180889 (2018) - 2017
- [j11]Zhikuang Cai, Haobo Xu, Shanwen Hu, Jun Yang:
Built-in jitter measurement circuit for PLL based on variable vernier delay line. IEICE Electron. Express 14(3): 20161116 (2017) - [j10]Zixuan Wang, Shanwen Hu, Zhikuang Cai, Bo Zhou, Xincun Ji, Rong Wang, Yufeng Guo:
A 2.4-GHz all-digital phase-locked loop with a pipeline-ΔΣ time-to-digital converter. IEICE Electron. Express 14(6): 20170095 (2017) - [j9]Weiwei Shan, Xinning Liu, Minyi Lu, Shuai Shao, Zhikuang Cai, Jun Yang:
An improved timing error prediction monitor for wide adaptive frequency scaling. IEICE Electron. Express 14(21): 20170808 (2017) - [c1]Tailong Xu, Feng Xue, Zhikuang Cai, Xinning Liu, Shuo Meng:
A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC. ASICON 2017: 167-170 - 2015
- [j8]Chao Chen, Jianhui Wu, Zhikuang Cai:
A 0.6 V passive mixer with high conversion gain in 65 nm CMOS process. IEICE Electron. Express 12(3): 20141127 (2015) - [j7]Tai-Long Xu, Feng Xue, Zhikuang Cai, Xian-He Gao, Xue-You Hu, Chang-Jun Zha, Yu-Feng Xu, Jun-Ning Chen:
A wide-range and fast-locking all digital SARDLL for DVFS SoCs. IEICE Electron. Express 12(12): 20150284 (2015) - 2014
- [j6]Lanhua Xia, Jianhui Wu, Zhikuang Cai, Meng Zhang, Xincun Ji:
A low-cost built-in self-test for CP-PLL based on TDC. IEICE Electron. Express 11(10): 20140247 (2014) - [j5]Jifei Tang, Qiao Meng, Yezi Lei, Zhikuang Cai:
Quasar signal estimation and compensation for data processing in VLBI receiver. IEICE Electron. Express 11(22): 20140897 (2014) - 2013
- [j4]Zhikuang Cai, Tailong Xu, Haiyan Sun, Longxing Shi:
A wide-range and ultra fast-locking all-digital SAR DLL without harmonic-locking. IEICE Electron. Express 10(22): 20130494 (2013) - [j3]Zhikuang Cai, Haobo Xu, Shixuan Que, Weiwei Shan, Jun Yang:
On-chip long-term jitter measurement for PLL based on undersampling technique. IEICE Electron. Express 10(24): 20130887 (2013) - 2012
- [j2]Haiyan Sun, Zhikuang Cai, Jianhui Wu, Longxing Shi:
An optimized QFP structure for use in radio frequency multi-chip module applications. IEICE Electron. Express 9(21): 1666-1674 (2012)
2000 – 2009
- 2009
- [j1]Kai Huang, Zhikuang Cai, Xin Chen, Longxing Shi:
A Harmonic-Free All Digital Delay-Locked Loop Using an Improved Fast-Locking Successive Approximation Register-Controlled Scheme. IEICE Trans. Electron. 92-C(12): 1541-1544 (2009)
Coauthor Index
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