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ORCIDMichel S. Nakhla
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2010 – 2019
- 2018
[j27]Wai-Kong Lee
, Ramachandra Achar, Michel S. Nakhla:
Dynamic GPU Parallel Sparse LU Factorization for Fast Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2518-2529 (2018)- 2017
- [j26]Mina A. Farhan, Michel S. Nakhla, Emad Gad, Ramachandra Achar:
Parallel High-Order Envelope-Following Method for Fast Transient Analysis of Highly Oscillatory Circuits. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 261-270 (2017) - 2014
- [j25]Douglas Paul, Ramachandra Achar, Michel S. Nakhla, Natalie Nakhla:
Addressing Partitioning Issues in Parallel Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2713-2723 (2014) - 2013
- [c37]Douglas Paul, Ramachandra Achar, Michel S. Nakhla, Natalie Nakhla:
Efficient parallel scheduler for circuit simulation exploiting binary link formulations. LASCAS 2013: 1-4 - 2012
- [j24]Yinghong Zhou, Emad Gad, Michel S. Nakhla, Ramachandra Achar:
Structural Characterization and Efficient Implementation Techniques for $A$-Stable High-Order Integration Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 101-108 (2012) - 2011
- [j23]Ramachandra Achar, Michel S. Nakhla, Harjot S. Dhindsa, Arvind R. Sridhar, Douglas Paul, Natalie Nakhla:
Parallel and Scalable Transient Simulator for Power Grids via Waveform Relaxation (PTS-PWR). IEEE Trans. Very Large Scale Integr. Syst. 19(2): 319-332 (2011) - 2010
- [j22]Nick Soveiko, Michel S. Nakhla, Ramachandra Achar:
Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(1): 65-77 (2010)
2000 – 2009
- 2009
- [j21]Emad Gad, Michel S. Nakhla, Ramachandra Achar, Yinghong Zhou:
A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential Equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1359-1372 (2009) - [j20]Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub:
Passivity Compensation Algorithm for Method-of-Characteristics-Based Multiconductor Transmission Line Interconnect Macromodels. IEEE Trans. Very Large Scale Integr. Syst. 17(8): 1061-1072 (2009) - 2008
- [j19]Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub:
A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3): 574-578 (2008) - 2007
- [j18]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
Fast Passivity Verification and Enforcement via Reciprocal Systems for Interconnects With Large Order Macromodels. IEEE Trans. Very Large Scale Integr. Syst. 15(1): 48-59 (2007) - [c36]Natalie Nakhla, Michel S. Nakhla, Ramachandra Achar:
Sparse and passive reduction of massively coupled large multiport interconnects. ICCAD 2007: 622-626 - 2006
- [j17]Praveen Pai, Emad Gad, Ramachandra Achar, Michel S. Nakhla, Roni Khazaka:
A Projection-Based Reduction Approach to Computing Sensitivity of Steady-State Response of Nonlinear Circuits. INFORMS J. Comput. 18(2): 173-185 (2006) - [c35]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
Circuit Compatible Macromodeling of High-Speed VLSI Modules Characterized by Scattering Parameters. VLSI Design 2006: 667-671 - [c34]Gurpreet Shinh, Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Ihsan Erdin:
Efficient and Accurate EMC Analysis of High-Frequency VLSI Subnetworks. VLSI Design 2006: 672-676 - 2005
- [j16]Emad Gad, Michel S. Nakhla:
Efficient model reduction of linear periodically time-varying systems via compressed transient system function. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(6): 1188-1204 (2005) - [j15]Emad Gad, Changzhong Chen, Michel S. Nakhla, Ramachandra Achar:
Passivity verification in delay-based macromodels of electrical interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(10): 2173-2187 (2005) - [j14]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
Global Passivity Enforcement Algorithm for Macromodels of Interconnect Subnetworks Characterized by Tabulated Data. IEEE Trans. Very Large Scale Integr. Syst. 13(7): 819-832 (2005) - [c33]Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Anestis Dounavis:
Delay extraction based closed-form SPICE compatible passive macromodels for distributed transmission line interconnects. ASP-DAC 2005: 1082-1085 - [c32]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
On passivity enforcement for macromodels of S-parameter based tabulated subnetworks. ISCAS (4) 2005: 3777-3780 - [c31]Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla:
Accurate and closed-form SPICE compatible passive macromodels for distributed interconnects with frequency dependent parameters. ISCAS (6) 2005: 5770-5773 - [c30]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
Projection Based Fast Passive Compact Macromodeling of High-Speed VLSI Circuits and Interconnects. VLSI Design 2005: 629-633 - 2004
- [j13]Emad Gad, Michel S. Nakhla:
Efficient simulation of nonuniform transmission lines using integrated congruence transform. IEEE Trans. Very Large Scale Integr. Syst. 12(12): 1307-1320 (2004) - [c29]Natalie Nakhla, Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla:
Fast sensitivity analysis of transmission line networks. ISCAS (5) 2004: 121-124 - [c28]Praveen Pai, Emad Gad, Ramachandra Achar, Roni Khazaka, Michel S. Nakhla:
Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniques. ISCAS (5) 2004: 333-336 - 2003
- [c27]Emad Gad, Michel S. Nakhla:
Model order reduction of nonuniform transmission lines using integrated congruence transform. DAC 2003: 238-243 - [c26]Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla:
Passive macromodeling of subnetworks characterized by measured data. ISCAS (3) 2003: 502-505 - 2002
- [c25]Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla:
Passive closed-form time-domain macromodels for on-chip distributed RC interconnects. CICC 2002: 509-512 - [c24]Emad Gad, Michel S. Nakhla:
Efficient Model Reduction of Linear Time-Varying Systems via Compressed Transient System Function. DATE 2002: 916-922 - [c23]Roni Khazaka, Michel S. Nakhla:
Compact Macromodel for Lossy Coupled Transmission Lines. DATE 2002: 1114 - [c22]Yuichi Tanji, Akio Ushida, Michel S. Nakhla:
Passive closed-form expression of RLCG transmission lines. ISCAS (3) 2002: 795-798 - 2001
- [j12]Ramachandra Achar, Michel S. Nakhla:
Simulation of high-speed interconnects. Proc. IEEE 89(5): 693-728 (2001) - [j11]Ramachandra Achar, Michel S. Nakhla:
Correction To "simulation of high-speed Interconnects". Proc. IEEE 89(8): 1230 (2001) - [c21]Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla:
A general class of passive macromodels for efficient sensitivity analysis of high-speed distributed interconnects with nonlinear terminations. ICECS 2001: 899-902 - 2000
- [j10]Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar:
Simulation of high-speed distributed interconnects using Krylov-space techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(7): 799-808 (2000) - [c20]Pavan K. Gunupudi, Michel S. Nakhla:
Multi-dimensional model reduction of VLSI interconnects. CICC 2000: 499-502 - [c19]Emad Gad, Anestis Dounavis, Michel S. Nakhla, Ramachandra Achar:
Passive model order reduction of multiport distributed interconnects. DAC 2000: 526-531
1990 – 1999
- 1999
- [c18]Pavan K. Gunupudi, Michel S. Nakhla:
Model-Reduction of Nonlinear Circuits Using Krylov-Space Techniques. DAC 1999: 13-16 - [c17]Emad Gad, Michel S. Nakhla:
Model reduction for DC solution of large nonlinear circuits. ICCAD 1999: 376-379 - [c16]Ramachandra Achar, Michel S. Nakhla:
Efficient simulation of on-chip RF components using model-reduction techniques. ISCAS (2) 1999: 81-84 - [c15]Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar:
Multi-point multi-port reduction of high-speed distributed interconnects using Krylov-space techniques. ISCAS (6) 1999: 242-245 - [r1]Michel S. Nakhla, Ramachandra Achar:
Interconnect Modeling and Simulation. The VLSI Handbook 1999 - 1998
- [j9]Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang:
Full-wave analysis of high-speed interconnects using complex frequency hopping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10): 997-1016 (1998) - 1997
- [c14]J. Richard Griffith, Michel S. Nakhla:
A new high-order absolutely-stable explicit numerical integration algorithm for the time-domain simulation of nonlinear circuits. ICCAD 1997: 276-280 - 1996
- [c13]Guowu Zheng, Qi-Jun Zhang, Michel S. Nakhla, Ramachandra Achar:
An efficient approach for moment-matching simulation of linear subnetworks with measured or tabulated data. ICCAD 1996: 20-23 - 1995
- [j8]Eli Chiprout, Michel S. Nakhla:
Analysis of interconnect networks using complex frequency hopping (CFH). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(2): 186-200 (1995) - [c12]Qi-Jun Zhang, Fang Wang, Michel S. Nakhla:
A high-order temporal neural network for word recognition. ICASSP 1995: 3343-3346 - [c11]Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang:
Addressing high frequency effects in VLSI interconnects with full wave model and CFH. ICCAD 1995: 53-56 - [c10]A. Hafid Zaabab, Qi-Jun Zhang, Michel S. Nakhla:
Application of neural networks in circuit analysis. ICNN 1995: 423-426 - 1994
- [j7]Nelson Liu, Michel S. Nakhla, Qi-Jun Zhang:
Time domain sensitivity of high-speed VLSI interconnects. Int. J. Circuit Theory Appl. 22(6): 479-511 (1994) - [j6]Sanjay L. Manney, Michel S. Nakhla, Qi-Jun Zhang:
Analysis of nonuniform, frequency-dependent high-speed interconnects using numerical inversion of Laplace transform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(12): 1513-1525 (1994) - [c9]Qi-Jun Zhang, Michel S. Nakhla:
Signal Integrity Analysis and Optimization of VLSI Interconnects using Neural Network Models. ISCAS 1994: 459-462 - 1993
- [j5]Dong H. Xie, Michel S. Nakhla:
Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(11): 1798-1811 (1993) - [c8]Eli Chiprout, Michel S. Nakhla:
Addressing High-Speed Interconnect Issues in Asymptotic Waveform Evaluation. DAC 1993: 732-736 - [c7]Eli Chiprout, Hansruedi Heeb, Michel S. Nakhla, Albert E. Ruehli:
Simulating 3-D retarded interconnect models using complex frequency hopping (CFH). ICCAD 1993: 66-72 - [c6]J. Richard Griffith, Qi-Jun Zhang, Michel S. Nakhla:
Parallel Time Domain Analysis and Optimization of Distributed VLSI Interconnects. ISCAS 1993: 1543-1546 - [c5]J. Richard Griffith, Qi-Jun Zhang, Michel S. Nakhla:
Parallel Time Domain Analysis and Optimization of High-Speed VLSI Interconnects. PPSC 1993: 225-227 - 1992
- [j4]Tak K. Tang, Michel S. Nakhla:
Analysis of high-speed VLSI interconnects using the asymptotic waveform evaluation technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(3): 341-352 (1992) - [j3]J. Richard Griffith, Michel S. Nakhla:
Mixed frequency/time domain analysis of nonlinear circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(8): 1032-1043 (1992) - [c4]Eli Chiprout, Michel S. Nakhla:
Generalized Moment-Matching Methods for Transient Analysis of Interconnect Networks. DAC 1992: 201-206 - [c3]Sanjay L. Manney, Michel S. Nakhla, Qi-Jun Zhang:
Time domain analysis of nonuniform frequency dependent high-speed interconnects. ICCAD 1992: 449-453 - 1991
- [c2]Dong H. Xie, Michel S. Nakhla:
Delay and Crosstalk Simulation of High-Speed VLSI Interconnects with Nonlinear Terminations. ICCAD 1991: 66-69 - 1990
- [j2]Michel S. Nakhla:
Performance Evaluation of Optical Fiber Transmission Systems. IEEE J. Sel. Areas Commun. 8(8): 1617-1623 (1990) - [c1]Tak K. Tang, Michel S. Nakhla:
Analysis of High-Speed VLSI Interconnects Using the Asymptotic Waveform Evaluation Technique. ICCAD 1990: 542-545
1980 – 1989
- 1982
- [j1]Michel S. Nakhla, David H. A. Black:
Analysis of a TASI System Employing Speech Storage. IEEE Trans. Commun. 30(4): 780-785 (1982)
Coauthor Index
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