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2020 – today
- 2021
[c13]Matthew M. Ziegler, Jihye Kwon
, Hung-Yi Liu, Luca P. Carloni:
Online and Offline Machine Learning for Industrial Design Flow Tuning: (Invited - ICCAD Special Session Paper). ICCAD 2021: 1-9
2010 – 2019
- 2017
- [c12]Nai-Wen Liang, Hung-Yi Liu, Chun-En Chien, Qi-Guang Chen, Po-Lun Chang, Wei-Ming Chen, Bo-Gui Wu:
Developing Mobile Health Management System for Patients with Musculoskeletal Tumor. MedInfo 2017: 1233 - 2016
- [c11]Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni:
A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis Programs. RES4ANT@DATE 2016: 8-12 - [c10]Matthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni:
A synthesis-parameter tuning system for autonomous design-space exploration. DATE 2016: 1148-1151 - [c9]Matthew M. Ziegler, Hung-Yi Liu, Luca P. Carloni:
Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors. ISLPED 2016: 180-185 - 2015
- [b1]Hung-Yi Liu:
Supervised Design-Space Exploration. Columbia University, USA, 2015 - 2013
- [c8]Hung-Yi Liu, Luca P. Carloni:
On learning-based methods for design-space exploration with high-level synthesis. DAC 2013: 50:1-50:7 - [c7]Nicola Bombieri, Hung-Yi Liu, Franco Fummi, Luca P. Carloni:
A method to abstract RTL IP blocks into C++ code and enable high-level synthesis. DAC 2013: 156:1-156:9 - 2012
- [c6]Hung-Yi Liu, Michele Petracca, Luca P. Carloni:
Compositional system-level design exploration with planning of high-level synthesis. DATE 2012: 641-646 - 2011
- [c5]Hung-Yi Liu, Ilias Diakonikolas, Michele Petracca, Luca P. Carloni:
Supervised design space exploration by compositional approximation of Pareto sets. DAC 2011: 399-404
2000 – 2009
- 2009
- [j2]Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang:
Voltage-Island Partitioning and Floorplanning Under Timing Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 690-702 (2009) - 2008
- [j1]Chih-Hung Liu, Hung-Yi Liu, Chung-Wei Lin, Szu-Jui Chou, Yao-Wen Chang, Sy-Yen Kuo, Shih-Yi Yuan, Yu-Wei Chen:
An Efficient Graph-Based Algorithm for ESD Current Path Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8): 1363-1375 (2008) - 2007
- [c4]Hung-Yi Liu, Wan-Ping Lee, Yao-Wen Chang:
A Provably Good Approximation Algorithm for Power Optimization Using Multiple Supply Voltages. DAC 2007: 887-890 - [c3]Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang:
An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning. ICCAD 2007: 650-655 - 2006
- [c2]Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang:
Voltage island aware floorplanning for power and timing optimization. ICCAD 2006: 389-394 - [c1]Hung-Yi Liu, Chung-Wei Lin, Szu-Jui Chou, Wei-Ting Tu, Chih-Hung Liu, Yao-Wen Chang, Sy-Yen Kuo:
Current path analysis for electrostatic discharge protection. ICCAD 2006: 510-515
Coauthor Index
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