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ORCIDJosé A. Joao
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2020 – today
- 2023
[c17]Víctor Soria Pardos
, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó:
DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. ISCA 2023: 30:1-30:13- 2020
- [j6]Masab Ahmad, Halit Dogan, José A. Joao, Omer Khan:
In-Hardware Moving Compute to Data Model to Accelerate Thread Synchronization on Large Multicores. IEEE Micro 40(1): 83-92 (2020)
2010 – 2019
- 2019
- [c16]Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó:
On the Benefits of Tasking with OpenMP. IWOMP 2019: 217-230 - [c15]Joshua Randall, Alejandro Rico, José A. Joao:
Cache Line Sharing and Communication in ECP Proxy Applications. IWOMP 2019: 306-319 - [c14]Ziqiang Huang, José A. Joao, Alejandro Rico, Andrew D. Hilton, Benjamin C. Lee:
DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management. MICRO 2019: 426-439 - 2018
- [c13]Wooseok Lee, Reena Panda, Dam Sunwoo, José A. Joao, Andreas Gerstlauer, Lizy K. John:
BUQS: Battery- and user-aware QoS scaling for interactive mobile devices. ASP-DAC 2018: 64-69 - [c12]Halit Dogan, Masab Ahmad, José A. Joao, Omer Khan:
Accelerating Synchronization in Graph Analytics Using Moving Compute to Data Model on Tilera TILE-Gx72. ICCD 2018: 496-505 - [c11]Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, José A. Joao, Moinuddin K. Qureshi:
Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories. MICRO 2018: 416-427 - 2017
- [c10]Alejandro Rico, José A. Joao, Chris Adeniyi-Jones, Eric Van Hensbergen:
ARM HPC Ecosystem and the Reemergence of Vectors: Invited Paper. Conf. Computing Frontiers 2017: 329-334 - 2013
- [c9]José A. Joao, M. Aater Suleman, Onur Mutlu, Yale N. Patt:
Utility-based acceleration of multithreaded applications on asymmetric CMPs. ISCA 2013: 154-165 - 2012
- [c8]José A. Joao, M. Aater Suleman, Onur Mutlu, Yale N. Patt:
Bottleneck identification and scheduling in multithreaded applications. ASPLOS 2012: 223-234 - 2011
- [j5]M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt:
Data Marshaling for Multicore Systems. IEEE Micro 31(1): 56-64 (2011) - [c7]Eiman Ebrahimi, Rustam Miftakhutdinov, Chris Fallin, Chang Joo Lee, José A. Joao, Onur Mutlu, Yale N. Patt:
Parallel application memory scheduling. MICRO 2011: 362-373 - 2010
- [c6]M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt:
Data marshaling for multi-core architectures. ISCA 2010: 441-450
2000 – 2009
- 2009
- [j4]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. IEEE Trans. Computers 58(9): 1153-1170 (2009) - [c5]José A. Joao, Onur Mutlu, Yale N. Patt:
Flexible reference-counting-based hardware acceleration for garbage collection. ISCA 2009: 418-428 - 2008
- [j3]José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. 7(1): 1-4 (2008) - [c4]José A. Joao, Onur Mutlu, Hyesoon Kim, Rishi Agarwal, Yale N. Patt:
Improving the performance of object-oriented languages with dynamic predication of indirect jumps. ASPLOS 2008: 80-90 - 2007
- [j2]José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. 6(2): 25-28 (2007) - [j1]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication. IEEE Micro 27(1): 94-104 (2007) - [c3]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. CGO 2007: 367-378 - [c2]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. ISCA 2007: 424-435 - 2006
- [c1]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths. MICRO 2006: 53-64
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