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ORCIDDipankar Das 0002
Person information
- affiliation: GM
- affiliation: Indian Institute of Technology Kharagpur
Other persons with the same name
- Dipankar Das — disambiguation page
- Dipankar Das 0001
![[0000-0002-8110-9344]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-8110-9344")
— Jadavpur University, Kolkata, India - Dipankar Das 0003 — University of Rajshahi, Bangladesh (and 1 more)
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2020 – today
- 2021
[c20]Jacob R. Stevens, Dipankar Das, Sasikanth Avancha, Bharat Kaul, Anand Raghunathan:
GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks. DAC 2021: 955-960- [c19]Eric Qin, Geonhwa Jeong, William Won, Sheng-Chun Kao, Hyoukjun Kwon, Sudarshan Srinivasan, Dipankar Das, Gordon Euhyun Moon, Sivasankaran Rajamanickam, Tushar Krishna:
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. IPDPS 2021: 1014-1024 - [c18]Brunno F. Goldstein, Victor da Cruz Ferreira, Sudarshan Srinivasan, Dipankar Das, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França:
A Lightweight Error-Resiliency Mechanism for Deep Neural Networks. ISQED 2021: 311-316 - [i15]Eric Qin, Geonhwa Jeong, William Won, Sheng-Chun Kao, Hyoukjun Kwon, Sudarshan Srinivasan, Dipankar Das, Gordon Euhyun Moon, Sivasankaran Rajamanickam, Tushar Krishna:
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. CoRR abs/2103.10452 (2021) - [i14]Jacob R. Stevens, Dipankar Das, Sasikanth Avancha, Bharat Kaul, Anand Raghunathan:
GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks. CoRR abs/2103.10836 (2021) - 2020
- [c17]Eric Qin, Ananda Samajdar, Hyoukjun Kwon, Vineet Nadella, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul, Tushar Krishna:
SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training. HPCA 2020: 58-70 - [c16]Brunno F. Goldstein, Sudarshan Srinivasan, Dipankar Das, Kunal Banerjee, Leandro Santiago de Araújo, Victor da Cruz Ferreira, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França:
Reliability Evaluation of Compressed Deep Learning Models. LASCAS 2020: 1-5
2010 – 2019
- 2019
- [c15]Ashish Ranjan, Shubham Jain, Jacob R. Stevens, Dipankar Das, Bharat Kaul, Anand Raghunathan:
X-MANN: A Crossbar based Architecture for Memory Augmented Neural Networks. DAC 2019: 130 - [c14]Jacob R. Stevens, Ashish Ranjan, Dipankar Das, Bharat Kaul, Anand Raghunathan:
Manna: An Accelerator for Memory-Augmented Neural Networks. MICRO 2019: 794-806 - [i13]Dhiraj D. Kalamkar, Dheevatsa Mudigere, Naveen Mellempudi, Dipankar Das, Kunal Banerjee, Sasikanth Avancha, Dharma Teja Vooturi, Nataraj Jammalamadaka, Jianyu Huang, Hector Yuen, Jiyan Yang, Jongsoo Park, Alexander Heinecke, Evangelos Georganas, Sudarshan Srinivasan, Abhisek Kundu, Misha Smelyanskiy, Bharat Kaul, Pradeep Dubey:
A Study of BFLOAT16 for Deep Learning Training. CoRR abs/1905.12322 (2019) - [i12]Naveen Mellempudi, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul:
Mixed Precision Training With 8-bit Floating Point. CoRR abs/1905.12334 (2019) - [i11]Sudarshan Srinivasan, Pradeep Janedula, Saurabh Dhoble, Sasikanth Avancha, Dipankar Das, Naveen Mellempudi, Bharat Daga, Martin Langhammer, Gregg Baeckler, Bharat Kaul:
High Performance Scalable FPGA Accelerator for Deep Neural Networks. CoRR abs/1908.11809 (2019) - [i10]Abhisek Kundu, Sudarshan Srinivasan, Eric C. Qin, Dhiraj D. Kalamkar, Naveen K. Mellempudi, Dipankar Das, Kunal Banerjee, Bharat Kaul, Pradeep Dubey:
K-TanH: Hardware Efficient Activations For Deep Learning. CoRR abs/1909.07729 (2019) - 2018
- [c13]Anirban Santara, Abhishek Naik, Balaraman Ravindran, Dipankar Das, Dheevatsa Mudigere, Sasikanth Avancha, Bharat Kaul:
RAIL: Risk-Averse Imitation Learning. AAMAS 2018: 2062-2063 - [c12]Apoorv Vyas, Nataraj Jammalamadaka, Xia Zhu, Dipankar Das, Bharat Kaul, Theodore L. Willke:
Out-of-Distribution Detection Using an Ensemble of Self Supervised Leave-Out Classifiers. ECCV (8) 2018: 560-574 - [c11]Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov:
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. ICLR (Poster) 2018 - [i9]Srinivas Sridharan, Karthikeyan Vaidyanathan, Dhiraj D. Kalamkar, Dipankar Das, Mikhail E. Smorkalov, Mikhail Shiryaev, Dheevatsa Mudigere, Naveen Mellempudi, Sasikanth Avancha, Bharat Kaul, Pradeep Dubey:
On Scale-out Deep Learning Training for Cloud and HPC. CoRR abs/1801.08030 (2018) - [i8]Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov:
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. CoRR abs/1802.00930 (2018) - [i7]Apoorv Vyas, Nataraj Jammalamadaka, Xia Zhu, Dipankar Das, Bharat Kaul, Theodore L. Willke:
Out-of-Distribution Detection Using an Ensemble of Self Supervised Leave-out Classifiers. CoRR abs/1809.03576 (2018) - 2017
- [c10]Swagath Venkataramani, Ashish Ranjan, Subarno Banerjee, Dipankar Das, Sasikanth Avancha, Ashok Jagannathan, Ajaya Durg, Dheemanth Nagaraj, Bharat Kaul, Pradeep Dubey, Anand Raghunathan:
ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep Networks. ISCA 2017: 13-26 - [i6]Naveen Mellempudi, Abhisek Kundu, Dipankar Das, Dheevatsa Mudigere, Bharat Kaul:
Mixed Low-precision Deep Learning Inference using Dynamic Fixed Point. CoRR abs/1701.08978 (2017) - [i5]Naveen Mellempudi, Abhisek Kundu, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey:
Ternary Neural Networks with Fine-Grained Quantization. CoRR abs/1705.01462 (2017) - [i4]Abhisek Kundu, Kunal Banerjee, Naveen Mellempudi, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey:
Ternary Residual Networks. CoRR abs/1707.04679 (2017) - [i3]Anirban Santara, Abhishek Naik, Balaraman Ravindran, Dipankar Das, Dheevatsa Mudigere, Sasikanth Avancha, Bharat Kaul:
RAIL: Risk-Averse Imitation Learning. CoRR abs/1707.06658 (2017) - 2016
- [i2]Dipankar Das, Sasikanth Avancha, Dheevatsa Mudigere, Karthikeyan Vaidyanathan, Srinivas Sridharan, Dhiraj D. Kalamkar, Bharat Kaul, Pradeep Dubey:
Distributed Deep Learning Using Synchronous Stochastic Gradient Descent. CoRR abs/1602.06709 (2016) - 2015
- [j5]Narayanan Sundaram, Nadathur Satish, Md. Mostofa Ali Patwary, Subramanya Dulloor, Michael J. Anderson, Satya Gautam Vadlamudi, Dipankar Das, Pradeep Dubey:
GraphMat: High performance graph analytics made productive. Proc. VLDB Endow. 8(11): 1214-1225 (2015) - [c9]Karthikeyan Vaidyanathan, Dhiraj D. Kalamkar, Kiran Pamnany, Jeff R. Hammond, Pavan Balaji, Dipankar Das, Jongsoo Park, Bálint Joó:
Improving concurrency and asynchrony in multithreaded MPI applications using software offloading. SC 2015: 30:1-30:12 - [c8]Md. Mostofa Ali Patwary, Nadathur Rajagopalan Satish, Narayanan Sundaram, Jongsoo Park, Michael J. Anderson, Satya Gautam Vadlamudi, Dipankar Das, Sergey G. Pudov, Vadim O. Pirogov, Pradeep Dubey:
Parallel Efficient Sparse Matrix-Matrix Multiplication on Multicore Platforms. ISC 2015: 48-57 - [i1]Narayanan Sundaram, Nadathur Rajagopalan Satish, Md. Mostofa Ali Patwary, Subramanya Dulloor, Satya Gautam Vadlamudi, Dipankar Das, Pradeep Dubey:
GraphMat: High performance graph analytics made productive. CoRR abs/1503.07241 (2015) - 2013
- [c7]Saptarshi Roy, Amit Patra, Partha Pratim Chakrabarti, Purnendu Sinha, Dipankar Das:
Prediction Schemes for Compensating Variable Delay for Improving Performance of Real-Time Control Tasks. VLSI Design 2013: 19-24 - 2012
- [c6]Vishal Shrivastav, Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha:
Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults. ISED 2012: 167-171 - 2011
- [c5]Satya Gautam Vadlamudi, P. P. Chakrabarti, Dipankar Das, Purnendu Sinha:
A framework for early stage quality-fault tolerance analysis of embedded control systems. DSN 2011: 315-322 - [c4]Dipankar Das, P. P. Chakrabarti, Purnendu Sinha:
Robust embedded software design through early analysis of quality faults. ISEC 2011: 31-40 - 2010
- [j4]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar:
Thermal analysis of multiprocessor SoC applications by simulation and verification. ACM Trans. Design Autom. Electr. Syst. 15(2): 15:1-15:52 (2010)
2000 – 2009
- 2009
- [j3]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar:
Scenario-based timing verification of multiprocessor embedded applications. ACM Trans. Design Autom. Electr. Syst. 14(3): 37:1-37:58 (2009) - 2008
- [j2]Rajeev Kumar, Dipankar Das:
Code compression for performance enhancement of variable-length embedded processors. ACM Trans. Embed. Comput. Syst. 7(3): 35:1-35:36 (2008) - 2007
- [j1]Dipankar Das, P. P. Chakrabarti, Rajeev Kumar:
Functional verification of task partitioning for multiprocessor embedded systems. ACM Trans. Design Autom. Electr. Syst. 12(4): 44 (2007) - 2006
- [c3]Dipankar Das, Rajeev Kumar, P. P. Chakrabarti:
Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. APSEC 2006: 199-208 - [c2]Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, Subrat Kumar Panda, P. P. Chakrabarti:
SystemC Modeling and Validation of A RISC Processor System. FDL 2006: 189-197 - 2005
- [c1]Dipankar Das, Rajeev Kumar, P. P. Chakrabarti:
Dictionary Based Code Compression for Variable Length Instruction Encodings. VLSI Design 2005: 545-550
Coauthor Index
aka: Partha Pratim Chakrabarti
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