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Journal Articles
- 2018
[j2]Thierry Bonnoit
, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Reducing Rollback Cost in VLSI Circuits to Improve Fault Tolerance. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1438-1451 (2018)- 2013
- [j1]Thierry Bonnoit, Michael Nicolaidis, Nacer-Eddine Zergainoh:
Using Error Correcting Codes Without Speed Penalty in Embedded Memories: Algorithm, Implementation and Case Study. J. Electron. Test. 29(3): 383-400 (2013)
Conference and Workshop Papers
- 2018
- [c6]Thierry Bonnoit, Fraidy Bouesse, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Designing reliable processor cores in ultimate CMOS and beyond: A double sampling solution. DATE 2018: 905-908 - 2017
- [c5]Thierry Bonnoit, Nacer-Eddine Zergainoh, Michael Nicolaidis, Raoul Velazco:
Low cost rollback to improve fault-tolerance in VLSI circuits. LASCAS 2017: 1-4 - [c4]Thierry Bonnoit, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco:
SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core. LATS 2017: 1-4 - 2014
- [c3]Thierry Bonnoit, Dominique Morche, Cedric Dehos, Emeric de Foucauld:
Robust BER estimator for DBPSK modulation. NEWCAS 2014: 153-156 - 2011
- [c2]Michael Nicolaidis, Thierry Bonnoit, Nacer-Eddine Zergainoh:
Eliminating speed penalty in ECC protected memories. DATE 2011: 1614-1619 - [c1]Thierry Bonnoit, Michael Nicolaidis, Nacer-Eddine Zergainoh:
Towards a tool for implementing delay-free ECC in embedded memories. ICCD 2011: 441-442
Coauthor Index
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