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Shu-Chang Kuo

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2010 – 2019

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2010
[c4]
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  dblp key:
  - conf/glvlsi/LinHLKLKLC10
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  - https://dblp.org/rec/conf/glvlsi/LinHLKLKLC10
Tay-Jyi Lin, Pi-Chen Hsiao, Chi-Hung Lin, Shu-Chang Kuo, Chou-Kun Lin, Yu-Ting Kuo, Chih-Wei Liu, Yuan-Hua Chu:
Collaborative voltage scaling with online STA and variable-latency datapath. ACM Great Lakes Symposium on VLSI 2010: 347-352

2000 – 2009

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2006
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  - conf/iscas/KuoHY06
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Shu-Chang Kuo, Tzu-Chien Hung, Wei-Bin Yang:
The new improved pseudo fractional-N clock generator with 50% duty cycle. ISCAS 2006
2005
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  - conf/ecctd/YangKCC05
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Wei-Bin Yang, Shu-Chang Kuo, Yuan-Hua Chu, Kuo-Hsing Cheng:
The new approach of programmable pseudo fractional-N clock generator for GHz operation with 50% duty cycle. ECCTD 2005: 193-196
2004
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  - conf/iscas/ChengYK04
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Kuo-Hsing Cheng, Wei-Bin Yang, Shu-Chang Kuo:
A dual-slope phase frequency detector and charge pump architecture to achieve fast locking of phased-locked loop. ISCAS (1) 2004: 777-780

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