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2020 – today
- 2020
[j6]Kevin E. Murray
, Oleg Petelin, Sheng Zhong, Jia Min Wang, Mohamed Eldafrawy, Jean-Philippe Legault, Eugene Sha, Aaron Graham, Jean Wu, Matthew J. P. Walker, Hanqing Zeng, Panagiotis Patros, Jason Luu, Kenneth B. Kent, Vaughn Betz:
VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling. ACM Trans. Reconfigurable Technol. Syst. 13(2): 9:1-9:55 (2020)- [j5]Kevin E. Murray, Jason Luu, Matthew J. P. Walker, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz:
Optimizing FPGA Logic Block Architectures for Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1378-1391 (2020)
2010 – 2019
- 2016
- [j4]S. Alexander Chin, Jason Luu, Safeen Huda, Jason Helge Anderson:
Hybrid LUT/Multiplexer FPGA Logic Architectures. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1280-1292 (2016) - 2015
- [j3]Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz:
Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD. ACM Trans. Reconfigurable Technol. Syst. 8(2): 10:1-10:18 (2015) - 2014
- [j2]Jason Luu, Jeffrey Goeders, Michael Wainberg, Andrew Somerville, Thien Yu, Konstantin Nasartschuk, Miad Nasr, Sen Wang, Tim Liu, Nooruddin Ahmed, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz:
VTR 7.0: Next Generation Architecture and CAD System for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7(2): 6:1-6:30 (2014) - [c8]Jason Luu, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz:
On Hard Adders and Carry Chains in FPGAs. FCCM 2014: 52-59 - [c7]Jason Luu, Jonathan Rose, Jason Helge Anderson:
Towards interconnect-adaptive packing for FPGAs. FPGA 2014: 21-30 - 2013
- [c6]Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz:
Titan: Enabling large and complex benchmarks in academic CAD. FPL 2013: 1-8 - [c5]Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz:
From Quartus to VPR: Converting HDL to BLIF with the Titan flow. FPL 2013: 1 - 2012
- [c4]Jonathan Rose, Jason Luu, Chi Wai Yu, Opal Densmore, Jeffrey Goeders, Andrew Somerville, Kenneth B. Kent, Peter Jamieson, Jason Helge Anderson:
The VTR project: architecture and CAD for FPGAs from verilog to routing. FPGA 2012: 77-86 - 2011
- [j1]Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Gean Ye, Wei Mark Fang, Kenneth B. Kent, Jonathan Rose:
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling. ACM Trans. Reconfigurable Technol. Syst. 4(4): 32:1-32:23 (2011) - [c3]Jason Luu, Jason Helge Anderson, Jonathan Rose:
Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect. FPGA 2011: 227-236
2000 – 2009
- 2009
- [c2]Jason Luu, Keith Redmond, William Lo, Paul Chow, Lothar Lilge, Jonathan Rose:
FPGA-based Monte Carlo Computation of Light Absorption for Photodynamic Cancer Therapy. FCCM 2009: 157-164 - [c1]Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Gean Ye, Wei Mark Fang, Jonathan Rose:
VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling. FPGA 2009: 133-142
Coauthor Index
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