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Roberto Gutiérrez
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2010 – 2019
- 2019
- [j7]Estefanía Alcocer, Roberto Gutiérrez, Otoniel Mario López Granado, Manuel P. Malumbres:
Design and implementation of an efficient hardware integer motion estimator for an HEVC video encoder. J. Real Time Image Process. 16(2): 547-557 (2019) - 2018
- [j6]Roberto Gutiérrez, José M. Blanes, David Marroqui, Ausiàs Garrigós, F. Javier Toledo-Moreo:
System-on-Chip for Real-Time Satellite Photovoltaic Curves Telemetry. IEEE Trans. Ind. Informatics 14(3): 951-957 (2018) - 2017
- [c4]Ausiàs Garrigós, David Marroqui, José M. Blanes, Roberto Gutiérrez, I. Blanquer, M. Canto:
Designing Arduino electronic shields: Experiences from secondary and university courses. EDUCON 2017: 934-937 - 2015
- [c3]Ausiàs Garrigós, José M. Blanes, Roberto Gutiérrez, Marcos Compadre, Craig Clark, Malcolm Macdonald:
Investigation into the potential use of integrated switching regulators for low-voltage, low-power phovotovoltaic conversion in space applications. IECON 2015: 1554-1560 - 2013
- [j5]Estefanía Alcocer, Otoniel Mario López Granado, Roberto Gutiérrez, Manuel P. Malumbres:
MPCM: a hardware coder for super slow motion video sequences. EURASIP J. Adv. Signal Process. 2013: 142 (2013) - 2012
- [j4]Roberto Gutiérrez, Vicente Torres-Carot, Javier Valls:
Hardware Architecture of a Gaussian Noise Generator Based on the Inversion Method. IEEE Trans. Circuits Syst. II Express Briefs 59-II(8): 501-505 (2012) - 2011
- [j3]Roberto Gutiérrez, Javier Valls:
Low Cost Hardware Implementation of Logarithm Approximation. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2326-2330 (2011) - 2010
- [j2]Roberto Gutiérrez, Vicente Torres-Carot, Javier Valls-Coquillat:
FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques. J. Syst. Archit. 56(11): 588-596 (2010)
2000 – 2009
- 2009
- [j1]Roberto Gutiérrez, Javier Valls:
Low-Power FPGA-Implementation of atan(Y/X) Using Look-Up Table Methods for Communication Applications. J. Signal Process. Syst. 56(1): 25-33 (2009) - [c2]Roberto Gutiérrez, Javier Valls, Asuncion Perez-Pascual:
FPGA-implementation of Time-Multiplexed Multiple Constant Multiplication based on carry-save arithmetic. FPL 2009: 609-612 - 2007
- [c1]Roberto Gutiérrez, Javier Valls:
Implementation on FPGA of a LUT-based atan(Y/X) operator suitable for Synchronization Algorithms. FPL 2007: 472-475
Coauthor Index
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