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ORCIDRaymond A. Heald
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2000 – 2009
- 2005
[j4]Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena:
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 40(1): 52-59 (2005)- 2004
- [c2]Raymond A. Heald, Ping Wang:
Variability in sub-100nm SRAM designs. ICCAD 2004: 347-352 - 2000
- [j3]Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You:
A third-generation SPARC V9 64-b microprocessor. IEEE J. Solid State Circuits 35(11): 1526-1538 (2000)
1990 – 1999
- 1999
- [j2]Fabian Klass, Chaim Amir, Ashutosh Das, Kathirgamar Aingaran, Cindy Truong, Richard Wang, Anup Mehta, Raymond A. Heald, Gin Yee:
A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors. IEEE J. Solid State Circuits 34(5): 712-716 (1999) - 1998
- [j1]Raymond A. Heald, Ken Shin, Vinita Reddy, I-Feng Kao, Masood Khan, William L. Lynch, Gary Lauterbach, Joe Petolino:
64-KByte sum-addressed-memory cache with 1.6-ns cycle and 2.6-ns latency. IEEE J. Solid State Circuits 33(11): 1682-1689 (1998) - 1994
- [c1]Steven R. Boyle, Raymond A. Heald:
A CMOS Circuit for Real-Time Chip Temperature Measurement. COMPCON 1994: 286-291
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