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Suresh Seshadri
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2000 – 2009
- 2005
- [j2]Hugh McIntyre, Dennis Wendell, K. James Lin, P. Kaushik, Suresh Seshadri, Alfred Wang, V. Sundararaman, Ping Wang, Song Kim, Wen-Jay Hsu, Hee-Choul Park, Gideon Levinsky, Jiejun Lu, M. Chirania, Raymond A. Heald, Paul Lazar, Sanjaya Dharmasena:
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 40(1): 52-59 (2005) - 2003
- [c3]Bedabrata Pain, Bruce Hancock, Thomas Cunningham, Guang Yang, Suresh Seshadri, Julie Heynssens, Chris Wrigley:
CMOS Digital Imager Design from a System-on-a-chip Perspective. VLSI Design 2003: 395-400 - 2001
- [j1]Suresh Seshadri, Jacob A. Abraham:
Frequency Response Verification of Analog Circuits Using Global Optimization Techniques. J. Electron. Test. 17(5): 395-408 (2001) - [c2]Bedabrata Pain, Suresh Seshadri, Monico Ortiz, Chris Wrigley, Guang Yang:
CMOS imager with charge-leakage compensated frame difference and sum output. ISCAS (5) 2001: 223-226 - 2000
- [c1]Jeongjin Roh, Suresh Seshadri, Jacob A. Abraham:
Verification of Delta-Sigma Converters Using Adaptive Regression Modeling. ICCAD 2000: 182-187
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