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Caiban Sun
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2020 – today
- 2024
- [j9]Nengyuan Sun, Wenrui Liu, Jiafeng Cheng, Zhaokang Peng, Chunyang Wang, Caiban Sun, Heng Sha, Zhiyuan Pan, Ming Jin, Hongyang Zhao, Jinghe Wang, Yiming Wen, Pengliang Kong, Yunfeng Zhao, Yaoqiang Wang, Selçuk Köse, Weize Yu:
A novel SM4 cryptographic architecture against higher order power analysis attacks. Int. J. Circuit Theory Appl. 52(8): 4184-4198 (2024) - [j8]Wenrui Liu, Jiafeng Cheng, Nengyuan Sun, Heng Sha, Zunxian Fu, Zhaokang Peng, Chunyang Wang, Caiban Sun, Pengliang Kong, Yunfeng Zhao, Yaoqiang Wang, Weize Yu:
A 128-Gbps Pipelined SM4 Circuit With Dual DPA Attack Countermeasures. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1164-1168 (2024) - 2023
- [j7]Jiafeng Cheng, Wenrui Liu, Nengyuan Sun, Zhaokang Peng, Caiban Sun, Chunyang Wang, Yijian Bi, Yiming Wen, Hongliu Zhang, Pengcheng Zhang, Weize Yu:
A low output ripple and high security on-chip voltage regulation based on Fourier transform. Int. J. Circuit Theory Appl. 51(6): 2578-2591 (2023) - [j6]Wenrui Liu, Jiafeng Cheng, Nengyuan Sun, Zhaokang Peng, Caiban Sun, Chunyang Wang, Yiming Wen, Hongliu Zhang, Pengcheng Zhang, Weize Yu:
A novel hardware authentication primitive against modeling attacks. Int. J. Circuit Theory Appl. 51(6): 2993-3001 (2023) - [j5]Jiafeng Cheng, Wenrui Liu, Nengyuan Sun, Zhaokang Peng, Caiban Sun, Chunyang Wang, Yijian Bi, Yiming Wen, Hongliu Zhang, Pengcheng Zhang, Weize Yu:
A machine learning low-dropout regulator-assisted differential power analysis attack countermeasure with voltage scaling. Int. J. Circuit Theory Appl. 51(7): 3105-3117 (2023) - [j4]Caiban Sun, Wenrui Liu, Jiafeng Cheng, Nengyuan Sun, Zhaokang Peng, Heng Sha, Weize Yu:
A high-speed and low-latency hardware implementation of RC4 cryptographic algorithm. Int. J. Circuit Theory Appl. 51(12): 5980-5996 (2023) - [j3]Zhaokang Peng, Nengyuan Sun, Jiafeng Cheng, Wenrui Liu, Chunyang Wang, Yijian Bi, Caiban Sun, Yufei Wang, Yiming Wen, Yubin Wang, Weize Yu:
A sequential strong PUF architecture based on reconfigurable neural networks (RNNs) against state-of-the-art modeling attacks. Integr. 92: 83-90 (2023) - [j2]Nengyuan Sun, Jiafeng Cheng, Wenrui Liu, Zhaokang Peng, Caiban Sun, Chunyang Wang, Heng Sha, Yufei Wang, Weize Yu:
A novel on-chip linear and switching mixed regulation against power analysis attacks. Integr. 93: 102049 (2023) - [j1]Jiafeng Cheng, Nengyuan Sun, Wenrui Liu, Zhaokang Peng, Chunyang Wang, Caiban Sun, Yufei Wang, Yijian Bi, Yiming Wen, Hongliu Zhang, Pengcheng Zhang, Selçuk Köse, Weize Yu:
Neural Network-Based Entropy: A New Metric for Evaluating Side-Channel Attacks. J. Circuits Syst. Comput. 32(3): 2320001:1-2320001:12 (2023)
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last updated on 2024-11-20 21:58 CET by the dblp team
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