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ORCIDBehzad Zeinali
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2010 – 2019
- 2019
[j5]Behzad Zeinali
, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi:
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs. IEEE Trans. Emerg. Top. Comput. 7(2): 294-300 (2019)- [i1]Farshad Moradi, Hooman Farkhani, Behzad Zeinali, Hamdam Ghanatian, Johan Michel Alain Pelloux-Prayer, Tim Böhnert, Mohammad Zahedinejad, Hadi Heidari, Vahid Nabaei, Ricardo Ferreira, Johan Åkerman, Jens Kargaard Madsen:
Spin-Orbit-Torque-based Devices, Circuits and Architectures. CoRR abs/1912.01347 (2019) - 2018
- [j4]Behzad Zeinali, Dimitrios Karsinos, Farshad Moradi:
Progressive Scaled STT-RAM for Approximate Computing in Multimedia Applications. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 938-942 (2018) - [j3]Leila Bagheriye, Siroos Toofan, Roghayeh Saeidi, Behzad Zeinali, Farshad Moradi:
A Reduced Store/Restore Energy MRAM-Based SRAM Cell for a Non-Volatile Dynamically Reconfigurable FPGA. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1708-1712 (2018) - 2017
- [j2]Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi:
Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology. Int. J. Circuit Theory Appl. 45(11): 1647-1659 (2017) - [c5]Behzad Zeinali, Mahsa Esmaeili, Jens Kargaard Madsen, Farshad Moradi:
Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applications. ESSDERC 2017: 172-175 - [c4]Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi:
Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching. ICCD 2017: 463-468 - 2015
- [c3]Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi:
Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power. ISVLSI 2015: 74-79 - 2014
- [j1]Behzad Zeinali, Tohid Moosazadeh, Mohammad Yavari, Ángel Rodríguez-Vázquez:
Equalization-Based Digital Background Calibration Technique for Pipelined ADCs. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 322-333 (2014) - [c2]Farshad Moradi, Mohammad Tohidi, Behzad Zeinali, Jens Kargaard Madsen:
8T-SRAM Cell with Improved Read and Write Margins in 65 nm CMOS Technology. VLSI-SoC (Selected Papers) 2014: 95-109 - 2011
- [c1]Behzad Zeinali, Mohammad Yavari:
A new digital background correction algorithm with non-precision calibration signals for pipelined ADCs. ICECS 2011: 418-421
Coauthor Index
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