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2020 – today
- 2024
[c4]Yichao Zhang
, Marco Bertuletti, Samuel Riedel, Matheus A. Cavalcante, Alessandro Vanelli-Coralli, Luca Benini:
TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios. ACM Great Lakes Symposium on VLSI 2024: 86-91- [c3]Sudipta Das, Samuel Riedel, Marco Bertuletti, Luca Benini, Moritz Brunion, Julien Ryckaert, James Myers, Dwaipayan Biswas, Dragomir Milojevic:
3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs. ISCAS 2024: 1-5 - [i4]Yichao Zhang, Marco Bertuletti, Samuel Riedel, Matheus A. Cavalcante, Alessandro Vanelli-Coralli, Luca Benini:
TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios. CoRR abs/2405.04988 (2024) - [i3]Yichao Zhang, Marco Bertuletti, Chi Zhang, Samuel Riedel, Alessandro Vanelli-Coralli, Luca Benini:
A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR. CoRR abs/2408.08882 (2024) - 2023
- [c2]Marco Bertuletti, Yichao Zhang, Alessandro Vanelli-Coralli, Luca Benini:
Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-Core Processor. DATE 2023: 1-6 - [c1]Marco Bertuletti, Samuel Riedel, Yichao Zhang, Alessandro Vanelli-Coralli, Luca Benini:
Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster. SAMOS 2023: 241-254 - [i2]Marco Bertuletti, Samuel Riedel, Yichao Zhang, Alessandro Vanelli-Coralli, Luca Benini:
Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster. CoRR abs/2307.10248 (2023) - 2022
- [i1]Marco Bertuletti, Yichao Zhang, Alessandro Vanelli-Coralli, Luca Benini:
Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-core Processor. CoRR abs/2210.09196 (2022)
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