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ORCIDAng Li 0011
Person information
- affiliation: University of Washington, Seattle, WA, USA
- affiliation (former): Princeton University, Princeton, NJ, USA
Other persons with the same name
- Ang Li — disambiguation page
- Ang Li 0001 — University of Maryland, College Park, MD, USA
- Ang Li 0002 — Duke University, Durham, NC, USA
- Ang Li 0003
![[0000-0001-8235-7596]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0001-8235-7596")
— Xi'an Jiaotong University, Faculty of Electronic and Information Engineering, Shaanxi, China (and 3 more) - Ang Li 0004 — Beijing Forestry University, Department of Psychology, China (and 2 more)
- Ang Li 0005 — Duke University, Department of Electrical and Computer Engineering, Durham, NC, USA (and 1 more)
- Ang Li 0006 — Pacific Northwest National Laboratory, Richland, WA, USA
- Ang Li 0007 (aka: Ang Leon Li) — University of Queensland, Brisbane, QLD, Australia
- Ang Li 0008 — University of Melbourne, School of Computing and Information Systems, Parkville, Victoria, Australia
- Ang Li 0009 — Florida State University, Department of Computer Science, Tallahassee, FL, USA (and 1 more)
- Ang Li 0010 — Stanford University, CA, USA
- Ang Li 0012 — Nanjing University of Posts and Telecommunications, Nanjing, China
- Ang Li 0013 — Arizona State University, Tempe, AZ, USA
- Ang Li 0014 — Shanghai Normal University, Shanghai, China
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2020 – today
- 2023
[c8]Ting-Jung Chang, Ang Li, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, David Wentzlaff:
CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA. CICC 2023: 1-2- [c7]Fei Gao, Ting-Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul J. Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca P. Carloni, David Wentzlaff:
DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. CICC 2023: 1-2 - [c6]Ang Li, August Ning, David Wentzlaff:
Duet: Creating Harmony between Processors and Embedded FPGAs. HPCA 2023: 745-758 - [c5]Yanwen Xu, Ang Li, Tyler Sorensen:
Redwood: Flexible and Portable Heterogeneous Tree Traversal Workloads. ISPASS 2023: 201-213 - 2021
- [c4]Ang Li, David Wentzlaff:
PRGA: An Open-Source FPGA Research and Prototyping Framework. FPGA 2021: 127-137 - 2020
- [j1]Jonathan Balkind, Ting-Jung Chang, Paul J. Jackson, Georgios Tziantzioulis, Ang Li, Fei Gao, Alexey Lavrov, Grigory Chirkov, Jinzheng Tu, Mohammad Shahrad, David Wentzlaff:
OpenPiton at 5: A Nexus for Open and Agile Hardware Design. IEEE Micro 40(4): 22-31 (2020) - [c3]Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, David Wentzlaff:
BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research. ASPLOS 2020: 699-714 - [c2]Ang Li, David Wentzlaff:
Cycle-Free FPGA Routing Graphs. FPGA 2020: 322 - [c1]Ang Li, Ting-Jung Chang, David Wentzlaff:
Automated Design of FPGAs Facilitated by Cycle-Free Routing. FPL 2020: 208-213
Coauthor Index
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