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ORCIDPrashanth H. C.
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Journal Articles
- 2023
[j2]Prashanth H. C.
, Madhav Rao, Dhanya Eledath, Ramasubramanian C:
Trainable windows for SincNet architecture. EURASIP J. Audio Speech Music. Process. 2023(1): 3 (2023)- [j1]Prashanth H. C., Madhav Rao, Dhanya Eledath, V. Ramasubramanian:
Correction: Trainable windows for SincNet architecture. EURASIP J. Audio Speech Music. Process. 2023(1): 9 (2023)
Conference and Workshop Papers
- 2024
- [c23]Prashanth H. C., Madhav Rao:
Performance Analysis of OFA-NAS ResNet Topologies Across Diverse Hardware Compute Units. ACM Great Lakes Symposium on VLSI 2024: 604-607 - [c22]Prashanth H. C., Madhav Rao:
Roofline Performance Analysis of DNN Architectures on CPU and GPU Systems. ISQED 2024: 1-8 - [c21]Bindu G. Gowda, Prashanth H. C., V. N. Muralidhara, Madhav Rao:
Efficient Radix-4 Approximated Modified Booth Multiplier for Signal Processing and Computer Vision: A Probabilistic Design Approach. ISQED 2024: 1-8 - [c20]Prashanth H. C., Madhav Rao:
Evaluating Deep Neural Network Performance on Edge Accelerators: A Roofline Model Adopted Benchmarking Approach. SOCC 2024: 1-6 - 2023
- [c19]Prashanth H. C., Yash Dharmesh Mogal, Madhav Rao:
Design-Space Exploration of Systolic Array for Edge Inferencing Applications. AIMLSystems 2023: 2:1-2:8 - [c18]Mayank Kabra, Shreyas V. S, Prashanth H. C., Kedar Deshpande, Madhav Rao:
GCells: A Graph-Search Approach to Design Custom Cells for Computational Subsystems. DSD 2023: 117-123 - [c17]Sai Karthik Nandigama, Bindu G. Gowda, Prashanth H. C., Madhav Rao:
EBASA: Error Balanced Approximate Systolic Array Architecture Design. ACM Great Lakes Symposium on VLSI 2023: 473-476 - [c16]Bindu G. Gowda, Prashanth H. C., Madhav Rao:
IMAC: : A Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate Unit. ACM Great Lakes Symposium on VLSI 2023: 503-508 - [c15]Bindu G. Gowda, S. N. Raghava, Prashanth H. C., Pratyush Nandi, Madhav Rao:
ApproxCNN: Evaluation Of CNN With Approximated Layers Using In-Exact Multipliers. ICCD 2023: 46-53 - [c14]Prashanth H. C., Madhav Rao:
Meta-Heuristic Optimization of Transistor Sizing in CMOS Digital Designs. IJCCI 2023: 278-287 - [c13]Prashanth H. C., Sriniketh S. S, Shrikrishna Hebbar, Chinmaye R, Madhav Rao:
SQRTLIB : Library of Hardware Square Root Designs. ISQED 2023: 1-5 - [c12]Bindu G. Gowda, Prashanth H. C., Madhav Rao:
Error Diluted Approximate Multipliers Using Positive And Negative Compressors. ISQED 2023: 1-7 - [c11]Harshita Gupta, Mayank Kabra, Nitin D. Patwari, Prashanth H. C., Madhav Rao:
Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA. ISQED 2023: 1-9 - [c10]Mayank Kabra, Prashanth H. C., Kedar Deshpande, Madhav Rao:
eDRAM-OESP: A novel performance efficient in-embedded-DRAM-compute design for on-edge signal processing application. ISQED 2023: 1-7 - [c9]Mayank Kabra, Prashanth H. C., Kedar Deshpande, Madhav Rao:
HIE-DRAM: High Performance Efficient In-DRAM Computing Architecture for SIMD. ISQED 2023: 1-7 - [c8]Prashanth H. C., Prashanth Jonna, Madhav Rao:
CellFlow: Automated Standard Cell Design Flow. ISVLSI 2023: 1-5 - [c7]S. N. Raghava, Prashanth H. C., Bindu G. Gowda, Pratyush Nandi, Madhav Rao:
Design-Space Exploration of Multiplier Approximation in CNNs. ISVLSI 2023: 1-6 - [c6]Sai Karthik Nandigama, Prashanth H. C., Madhav Rao:
Design and Evaluation of Inexact Computation based Systolic Array for Convolution. LASCAS 2023: 1-4 - 2022
- [c5]Prashanth H. C., Madhav Rao:
Evolutionary Standard Cell Synthesis of Unconventional Designs. ACM Great Lakes Symposium on VLSI 2022: 189-192 - [c4]Prashanth H. C., Soujanya S. R, Bindu G. Gowda, Madhav Rao:
Design and Evaluation of In-Exact Compressor based Approximate Multipliers. ACM Great Lakes Symposium on VLSI 2022: 431-436 - [c3]Prashanth H. C., Madhav Rao:
SOMALib: Library of Exact and Approximate Activation Functions for Hardware-efficient Neural Network Accelerators. ICCD 2022: 746-753 - [c2]Prashanth H. C., Madhav Rao:
Improving Digital Circuit Synthesis of Complex Functions using Binary Weighted Fitness and Variable Mutation Rate in Cartesian Genetic Programming. IJCCI 2022: 112-120 - [c1]Mayank Kabra, Prashanth H. C., Madhav Rao:
Design and Evaluation of Performance-efficient SoC-on-FPGA for Cloud-based Healthcare Applications. NorCAS 2022: 1-6
Coauthor Index
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