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Yigi Kwon

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2020 – today

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2023
[j1]
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Hyunchul Yoon, Changuk Lee, Taewoong Kim, Yigi Kwon, Youngcheol Chae:
A 65-dB-SNDR Pipelined SAR ADC Using PVT-Robust Capacitively Degenerated Dynamic Amplifier. IEEE J. Solid State Circuits 58(4): 961-971 (2023)
[c3]
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Yigi Kwon, Sangwoo Lee, Changuk Lee, Hyunchul Yoon, Byounghan Min, Youngcheol Chae:
An 11bit 360MS/s Pipelined SAR ADC with Dynamic Negative-C Assisted Residue Amplifier. A-SSCC 2023: 1-3
2022
[c2]
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Hyunchul Yoon, Teawoong Kim, Yigi Kwon, Youngcheol Chae:
A 50 MS/s 65 dB-SNDR Pipelined SAR ADC using Capacitively Degenerated Two-Stage Dynamic Amplifier. VLSI Technology and Circuits 2022: 88-89
2021
[c1]
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Yigi Kwon, Byounghan Min, Jinhwan Lee, Wooyol Lee, Sunghyun Yang:
An 8.1 ENOB 10bit 400MS/s Pipelined ADC Using SAR and Sub-Ranging Flash. ISCAS 2021: 1-5

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