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2020 – today
- 2022
[c9]Francisco Bas, Pedro Benedicte, Sergi Alcaide
, Guillem Cabo, Fabio Mazzocchetti, Jaume Abella:
SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores. DATE 2022: 358-363- [c8]Nils-Johan Wessman, Fabio Malatesta, Stefano Ribes, Jan Andersson, Antonio García-Vilanova, Miguel Masmano, Vicente Nicolau, Paco Gomez, Jimmy Le Rhun, Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Fabio Mazzocchetti, Jaume Abella:
De-RISC: A Complete RISC-V Based Space-Grade Platform. DATE 2022: 802-807 - [c7]Guillem Cabo, Sergi Alcaide, Carles Hernández, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella:
SafeSU-2: a Safe Statistics Unit for Space MPSoCs. DATE 2022: 1085-1086 - [c6]Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Ramon Canal, Jaume Abella:
SafeX: Open Source Hardware and Software Components for Safety-Critical Systems. FDL 2022: 1-4 - [c5]Ramon Canal, Francisco Bas, Sergi Alcaide, Guillem Cabo, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Jaume Abella:
SafeDX: Standalone Modules Providing Diverse Redundancy for Safety-Critical Applications. SAMOS 2022: 383-393 - [i2]Fabio Mazzocchetti, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella:
SafeSoftDR: A Library to Enable Software-based Diverse Redundancy for Safety-Critical Tasks. CoRR abs/2210.00833 (2022) - [i1]Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella:
End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform. CoRR abs/2210.04683 (2022) - 2021
- [c4]Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Michael Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni:
Security, Reliability and Test Aspects of the RISC-V Ecosystem. ETS 2021: 1-10 - [c3]Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella:
SafeSU: an Extended Statistics Unit for Multicore Timing Interference. ETS 2021: 1-4 - [c2]Francisco Bas, Sergi Alcaide, Ruben Lorenzo, Guillem Cabo, Guillermo Gil, Oriol Sala, Fabio Mazzocchetti, David Trilla, Jaume Abella:
SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping. IOLTS 2021: 1-7 - [c1]Oriol Sala, Sergi Alcaide, Guillem Cabo, Francisco Bas, Ruben Lorenzo, Pedro Benedicte, David Trilla, Guillermo Gil, Fabio Mazzocchetti, Jaume Abella:
SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation. IOLTS 2021: 1-7
Coauthor Index
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