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ORCIDPengzhou He
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2020 – today
- 2024
[j12]Pengzhou He, Samira Carolina Oliva Madrigal, Çetin Kaya Koç, Tianyou Bao, Jiafeng Xie:
CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 451-480 (2024)- [j11]Tianyou Bao
, Pengzhou He, Jiafeng Xie, H. S. Jacinto:
AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC. ACM Trans. Reconfigurable Technol. Syst. 17(2): 29:1-29:23 (2024) - [j10]Tianyou Bao, Pengzhou He, Shi Bai, Jiafeng Xie:
TINA: TMVP-Initiated Novel Accelerator for Lightweight Ring-LWE-Based PQC. IEEE Trans. Very Large Scale Integr. Syst. 32(5): 870-882 (2024) - [c15]Pengzhou He, Ben Mongirdas, Çetin Kaya Koç, Jiafeng Xie:
LAMP: Efficient Implementation of Lightweight Accelerator for Polynomial MultiPlication, From Falcon to RBLWE-ENC. ACM Great Lakes Symposium on VLSI 2024: 210-215 - [c14]Pengzhou He, Tianyou Bao, Çetin Kaya Koç, Jiafeng Xie:
HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication. ISVLSI 2024: 355-360 - 2023
- [j9]Pengzhou He, Yazheng Tu, Çetin Kaya Koç, Jiafeng Xie:
Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication. IEEE Comput. Archit. Lett. 22(1): 57-60 (2023) - [j8]Pengzhou He, Tianyou Bao, Jiafeng Xie, Moeness G. Amin:
FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography. ACM Trans. Reconfigurable Technol. Syst. 16(3): 45:1-45:23 (2023) - [j7]Pengzhou He, Yazheng Tu, Tianyou Bao, Leonel Sousa, Jiafeng Xie:
COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 596-600 (2023) - [j6]Yazheng Tu, Pengzhou He, Çetin Kaya Koç, Jiafeng Xie:
LEAP: Lightweight and Efficient Accelerator for Sparse Polynomial Multiplication of HQC. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 892-896 (2023) - [j5]Pengzhou He, Yazheng Tu, Jiafeng Xie, H. S. Jacinto:
KINA: Karatsuba Initiated Novel Accelerator for Ring-Binary-LWE (RBLWE)-Based Post-Quantum Cryptography. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1551-1564 (2023) - [c13]Samuel Coulon, Pengzhou He, Tianyou Bao, Jiafeng Xie:
Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme Falcon. ACSSC 2023: 19-26 - [c12]Pengzhou He, Tianyou Bao, Yazheng Tu, Jiafeng Xie:
Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform. FCCM 2023: 114-120 - [c11]Tianyou Bao, Pengzhou He, Jiafeng Xie, H. S. Jacinto:
AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-based Lightweight PQC. ICFPT 2023: 6 - [c10]Pengzhou He, Yazheng Tu, Jiafeng Xie:
LOCS: LOw-Latency and ConStant-Timing Implementation of Fixed-Weight Sampler for HQC. ISCAS 2023: 1-5 - [c9]Pengzhou He, Jiafeng Xie:
Novel Implementation of High-Performance Polynomial Multiplication for Unified KEM Saber based on TMVP Design Strategy. ISQED 2023: 1-8 - [i2]Samuel Coulon, Pengzhou He, Tianyou Bao, Jiafeng Xie:
Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme FALCON. IACR Cryptol. ePrint Arch. 2023: 1427 (2023) - 2022
- [j4]Benjamin J. Lucas, Ali Alwan, Marion Murzello, Yazheng Tu, Pengzhou He, Andrew J. Schwartz, David Guevara, Ujjwal Guin, Kyle Juretus, Jiafeng Xie:
Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator. IEEE Comput. Archit. Lett. 21(1): 17-20 (2022) - [j3]José Luis Imaña, Pengzhou He, Tianyou Bao, Yazheng Tu, Jiafeng Xie:
Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography. IEEE Trans. Circuits Syst. I Regul. Pap. 69(8): 3297-3307 (2022) - [j2]Jiafeng Xie, Pengzhou He, Xiaofang Wang, José Luis Imaña:
Efficient Hardware Implementation of Finite Field Arithmetic $AB+C$AB+C for Binary Ring-LWE Based Post-Quantum Cryptography. IEEE Trans. Emerg. Top. Comput. 10(2): 1222-1228 (2022) - [c8]Tianyou Bao, José Luis Imaña, Pengzhou He, Jiafeng Xie:
Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography. CODES+ISSS 2022: 5-6 - [c7]Pengzhou He, Yazheng Tu, Ayesha Khalid, Máire O'Neill, Jiafeng Xie:
HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU. DFT 2022: 1-6 - [c6]Jiafeng Xie, Pengzhou He, Tianyou Bao:
Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform. FPGA 2022: 156 - [c5]Tianyou Bao, Pengzhou He, Jiafeng Xie:
Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography. HOST 2022: 157-160 - [c4]Pengzhou He, Tianyou Bao, Yazheng Tu, Jiafeng Xie:
HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber. ICCD 2022: 525-528 - [c3]Yazheng Tu, Pengzhou He, Chiou-Yng Lee, Danai Chasaki, Jiafeng Xie:
Hardware Implementation of High-Performance Polynomial Multiplication for KEM Saber. ISCAS 2022: 1160-1164 - [i1]Elizabeth Carter, Pengzhou He, Jiafeng Xie:
High-Performance Polynomial Multiplication Hardware Accelerators for KEM Saber and NTRU. IACR Cryptol. ePrint Arch. 2022: 628 (2022) - 2021
- [j1]Pengzhou He, Ujjwal Guin, Jiafeng Xie:
Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(2): 383-394 (2021) - [c2]Jiafeng Xie, Pengzhou He, Wujie Wen:
Efficient Implementation of Finite Field Arithmetic for Binary Ring-LWE Post-Quantum Cryptography Through a Novel Lookup-Table-Like Method. DAC 2021: 1279-1284 - [c1]Jiafeng Xie, Pengzhou He, Chiou-Yng Lee:
CROP: FPGA Implementation of High-Performance Polynomial Multiplication in Saber KEM based on Novel Cyclic-Row Oriented Processing Strategy. ICCD 2021: 130-137
Coauthor Index
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