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ORCIDPrem Kumar Ramesh
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2020 – today
- 2022
[j5]Koundinya Koorapati, Rubini Pandu
, Prem Kumar Ramesh, Sairam Veeraswamy, Usha Narasappa:
Towards a unified ontology for IoT fabric with SDDC. J. King Saud Univ. Comput. Inf. Sci. 34(8 Part B): 6077-6091 (2022)
2010 – 2019
- 2016
- [j4]Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani:
Managing contamination delay to improve Timing Speculation architectures. PeerJ Comput. Sci. 2: e79 (2016) - [j3]Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani:
Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors. IEEE Trans. Computers 65(3): 979-991 (2016) - [i2]Naga Durga Prasad Avirneni, Prem Kumar Ramesh, Arun K. Somani:
Managing contamination delay to improve Timing Speculation architectures. PeerJ Prepr. 4: e1412 (2016) - 2015
- [i1]Naga Durga Prasad Avirneni, Prem Ramesh, Arun K. Somani:
Managing contamination delay to improve Timing Speculation architectures. PeerJ Prepr. 3: e1412 (2015)
2000 – 2009
- 2009
- [c1]Shubhalaxmi Kher, T. S. Ganesh, Prem Ramesh, Arun K. Somani:
Greedy Dynamic Crossover Management in Hardware Accelerated Genetic Algorithm Implementations Using FPGA. UKSim 2009: 47-52 - 2007
- [j2]Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan:
Future generation supercomputers I: a paradigm for node architecture. SIGARCH Comput. Archit. News 35(5): 49-60 (2007) - [j1]Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Arvind M, Prem Kumar Ramesh, Karthik Ganesan, Viswanath Krishnamurthy, Sivaramakrishnan:
Future generation supercomputers II: a paradigm for cluster architecture. SIGARCH Comput. Archit. News 35(5): 61-70 (2007)
Coauthor Index
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