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Journal Articles
- 2024
[j3]Dongrui Li
, Ming Ming Wong, Yi Sheng Chong, Jun Zhou, Mohit Upadhyay, Ananta Narayanan Balaji, Aarthy Mani, Weng-Fai Wong, Li-Shiuan Peh, Anh Tuan Do, Bo Wang:
1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing. IEEE Trans. Very Large Scale Integr. Syst. 32(11): 2085-2092 (2024)- 2022
- [j2]Yi Sheng Chong, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do:
A 2.5 μW KWS Engine With Pruned LSTM and Embedded MFCC for IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1662-1666 (2022) - 2021
- [j1]Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Yi Sheng Chong, Anh Tuan Do:
A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1398-1402 (2021)
Conference and Workshop Papers
- 2024
- [c13]Vishnu P. Nambiar, Yi Sheng Chong, Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Zhaoying Li, Rohan Juneja, Li-Shiuan Peh, Tulika Mitra, Anh Tuan Do:
PACE: A Scalable and Energy Efficient CGRA in a RISC-V SoC for Edge Computing Applications. HCS 2024: 1 - [c12]Yi Sheng Chong, Hongyu Cao, Wang Ling Goh, Patrick Bore, Yuanzheng Paul Tan, Yung Szen Yap, Rainer Dumke, Vishnu P. Nambiar, Anh Tuan Do:
Quantum Readout Processing Accelerator with a CORDIC Core at Cryogenic Temperature. ISCAS 2024: 1-5 - [c11]Yi Sheng Chong, Rakshith Harish, Rajesh Chandrasekhara Panicker, Vishnu P. Nambiar, Anh Tuan Do:
A 420 GOPS/W CGRA with a Configurable MAC and Dynamic Truncation. ISCAS 2024: 1-5 - [c10]Zhangyi Pei, Vishnu P. Nambiar, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do:
3881 Gbps/W, 3005 µm AES Core with State Based Clock Gating for IoT applications. ISCAS 2024: 1-5 - 2023
- [c9]Qibang Zang, Wang Ling Goh, Yi Sheng Chong, Anh Tuan Do:
4b/4b/8b Precision Charge-Domain 8T-SRAM Based CiM for CNN Processing. AICAS 2023: 1-5 - [c8]Bo Wang, Ming Ming Wong, Dongrui Li, Yi Sheng Chong, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh, Aarthy Mani, Mohit Upadhyay, Ananta Narayanan Balaji, Anh Tuan Do:
1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing. ISCAS 2023: 1-5 - [c7]Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao:
A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS 2023: 1-5 - 2022
- [c6]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
0.08mm2 128nW MFCC Engine for Ultra-low Power, Always-on Smart Sensing Applications. ISCAS 2022: 2680-2684 - [c5]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
Recovering Accuracy of RRAM-based CIM for Binarized Neural Network via Chip-in-the-loop Training. ISCAS 2022: 2958-2962 - [c4]Yingfeng Wang, Yi Sheng Chong, Wang Ling Goh, Anh Tuan Do:
Noise-Aware and Lightweight LSTM for Keyword Spotting Applications. ISOCC 2022: 135-136 - 2021
- [c3]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
An Energy-Efficient Convolution Unit for Depthwise Separable Convolutional Neural Networks. ISCAS 2021: 1-5 - [c2]Yi Sheng Chong, Wang Ling Goh, Yew Soon Ong, Vishnu P. Nambiar, Anh Tuan Do:
Efficient Implementation of Activation Functions for LSTM accelerators. VLSI-SoC 2021: 1-5 - 2020
- [c1]Bin Zhao, Yi Sheng Chong, Anh-Tuan Do:
Area and Energy Efficient 2D Max-Pooling For Convolutional Neural Network Hardware Accelerator. IECON 2020: 423-427
Coauthor Index
aka: Anh Tuan Do
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