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ORCIDJunran Pu
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- affiliation: Nanyang Technological University, Jurong West, Singapore
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2020 – today
- 2023
[c6]Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao:
A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS 2023: 1-5- 2022
- [j6]Liwei Yang, Huaipeng Zhang, Tao Luo
, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong:
Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. Neurocomputing 474: 128-140 (2022) - [j5]Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong:
Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. Neurocomputing 508: 109 (2022) - 2021
- [j4]Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do:
A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 5081-5094 (2021) - [j3]Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do:
A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 471-475 (2021) - [j2]Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Yi Sheng Chong, Anh Tuan Do:
A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1398-1402 (2021) - [j1]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3148-3152 (2021) - 2020
- [c5]Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do:
0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC 2020: 1-4 - [c4]Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do:
Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c3]Junran Pu, Vishnu P. Nambiar, Anh-Tuan Do, Wang Ling Goh:
Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. ISCAS 2019: 1-5 - [c2]Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do:
Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC 2019: 27-32 - [c1]Yun Kwan Lee, Vishnu P. Nambiar, Junran Pu, Wang Ling Goh, Anh-Tuan Do:
Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. SoCC 2019: 242-247
Coauthor Index
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