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2020 – today
- 2024
[j4]Inbal Stanger
, Noam Roknian, Netanel Shavit, Yonatan Shoshan, Yoav Weizman, Adam Teman, Edoardo Charbon, Alexander Fish:
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 987-999 (2024)- [c9]Noam Roknian, Yonatan Shoshan, Inbal Stanger, Menachem Goldzweig, Yoav Weizmann, Adam Teman, Edoardo Charbon, Alexander Fish:
Methodologies for Device Characterization in Cryogenic Temperatures. PRIME 2024: 1-4 - [c8]Netanel Shavit, Inbal Stanger, Ramiro Taco, Leonid Yavits, Alexander Fish:
Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications. PRIME 2024: 1-4 - 2023
- [j3]Netanel Shavit, Inbal Stanger, Ramiro Taco, Alexander Fish, Itamar Levi:
Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow. IEEE Access 11: 116206-116218 (2023) - [c7]Noam Roknian, Yonatan Shoshan, Inbal Stanger, Adam Teman, Edoardo Charbon, Alexander Fish:
Overview of Cryogenic Operation in Nanoscale Technology Nodes. LASCAS 2023: 1-4 - 2022
- [j2]Yizhak Shifman, Inbal Stanger, Netanel Shavit, Ramiro Taco, Alexander Fish, Joseph Shor:
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic. IEEE J. Solid State Circuits 57(2): 596-608 (2022) - [c6]Inbal Stanger, Noam Roknian, Yonatan Shoshan, Zafrir Levy, Yoav Weizman, Edoardo Charbon, Adam Teman, Alexander Fish:
Evaluation of Dual Mode Logic Under Cryogenic Temperatures. ISCAS 2022: 361-364 - 2021
- [c5]Netanel Shavit, Inbal Stanger, Ramiro Taco, Marco Lanuzza, Alexander Fish:
Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-Based 16x16-Bit Booth Multiplier in 16-nm FinFET. ISCAS 2021: 1 - [c4]Inbal Stanger, Netanel Shavit, Ramiro Taco, Marco Lanuzza, Alexander Fish:
Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths. ISCAS 2021: 1 - 2020
- [j1]Inbal Stanger, Netanel Shavit, Ramiro Taco, Marco Lanuzza, Alexander Fish:
Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1639-1643 (2020) - [c3]Inbal Stanger, Netanel Shavit, Ramiro Taco, Leonid Yavits, Marco Lanuzza, Alexander Fish:
Robust Dual Mode Pass Logic (DMPL) for Energy Efficiency and High Performance. ISCAS 2020: 1-5 - [c2]Ramiro Taco, Leonid Yavits, Netanel Shavit, Inbal Stanger, Marco Lanuzza, Alexander Fish:
Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology. ISCAS 2020: 1-5 - [c1]Leonid Yavits, Ramiro Taco, Netanel Shavit, Inbal Stanger, Alexander Fish:
Dual Mode Logic Address Decoder. ISCAS 2020: 1-5
Coauthor Index
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