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ORCIDHossein Shakiba
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2020 – today
- 2024
[j13]Milad Haghi Kashani
, Hossein Shakiba, Ali Sheikholeslami:
A Low-Power High-BW PAM4 VCSEL Driver With Three-Tap FFE in 12-nm CMOS FinFET Process. IEEE J. Solid State Circuits 59(7): 1995-2004 (2024)- [j12]Mohammad Emami Meybodi, Hossein Shakiba, Ali Sheikholeslami:
Analysis and Design of an Optimal Noise Estimation and Cancellation Filter in Wireline Communication. IEEE Open J. Circuits Syst. 5: 153-165 (2024) - [j11]Jeremy Cosson-Martin, Jhoan Salinas, Hossein Shakiba, Ali Sheikholeslami:
FBMC vs. PAM and DMT for High-Speed Wireline Communication. IEEE Open J. Circuits Syst. 5: 243-253 (2024) - [j10]Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami:
A Companding Technique to Reduce Peak-to-Average Ratio in Discrete Multitone Wireline Receivers. IEEE Open J. Circuits Syst. 5: 302-313 (2024) - [j9]Jhoan Salinas, Hossein Shakiba, Ali Sheikholeslami:
A 45Gb/s Analog Multi-Tone Receiver Utilizing a 6-Tap MIMO-FFE in 22nm FDSOI. IEEE Open J. Circuits Syst. 5: 314-327 (2024) - [c5]Richard Barrie, Ming Yang, Hossein Shakiba, Anthony Chan Carusone:
An FPGA-Accelerated Platform for Post-FEC BER Analysis of 200 Gb/s Wireline Systems. MWSCAS 2024: 282-285 - 2023
- [j8]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
An Inductorless Optical Receiver Front-End Employing a High Gain-BW Product Differential Transimpedance Amplifier in 16-nm FinFET Process. IEEE Open J. Circuits Syst. 4: 36-49 (2023) - [c4]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process. ESSCIRC 2023: 369-372 - [c3]Jeremy Cosson-Martin, Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami:
Efficient PAPR Reduction for Discrete Multi-Tone Signalling in High-Speed Wireline Applications. MWSCAS 2023: 924-928 - [c2]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A 0.32pJ/b 90Gbps PAM4 Optical Receiver Front-End with Automatic Gain Control in 12nm CMOS FinFET. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j7]James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan, Davide Tonietto:
A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver. IEEE J. Solid State Circuits 57(1): 32-43 (2022) - [j6]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A Low-Noise High-Gain Broadband Transformer-Based Inverter-Based Transimpedance Amplifier. IEEE Open J. Circuits Syst. 3: 72-81 (2022) - [j5]Mohammad Emami Meybodi, Hector Gomez, Yu-Chun Lu, Hossein Shakiba, Ali Sheikholeslami:
Design and Implementation of an On-Demand Maximum-Likelihood Sequence Estimation (MLSE). IEEE Open J. Circuits Syst. 3: 97-108 (2022) - [j4]Jeremy Cosson-Martin, Hossein Shakiba, Ali Sheikholeslami:
An Efficient Filter-Bank Multi-Carrier System for High-Speed Wireline Applications. IEEE Open J. Circuits Syst. 3: 147-159 (2022) - 2021
- [j3]Jhoan Salinas, Jeremy Cosson-Martin, Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami:
Performance Comparison of Baseband Signaling and Discrete Multi-Tone for Wireline Communication. IEEE Open J. Circuits Syst. 2: 65-77 (2021) - [j2]Jeremy Cosson-Martin, Hossein Shakiba, Ali Sheikholeslami:
Timing Recovery and Adaptive Equalization for Discrete Multi-Tone Signalling in Wireline Applications. IEEE Open J. Circuits Syst. 2: 856-868 (2021) - [c1]James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan:
A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver. ISSCC 2021: 140-142 - 2020
- [j1]Ming Yang, Shayan Shahramian, Hossein Shakiba, Henry Wong, Peter Krotnev, Anthony Chan Carusone:
Statistical BER Analysis of Wireline Links With Non-Binary Linear Block Codes Subject to DFE Error Propagation. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 284-297 (2020)
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