"An FPGA-Accelerated Platform for Post-FEC BER Analysis of 200 Gb/s ..."

Richard Barrie et al. (2024)

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DOI: 10.1109/MWSCAS60917.2024.10658786

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-11

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Richard Barrie, Ming Yang, Hossein Shakiba, Anthony Chan Carusone:
An FPGA-Accelerated Platform for Post-FEC BER Analysis of 200 Gb/s Wireline Systems. MWSCAS 2024: 282-285

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