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ORCIDEdward J. F. Paulus
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2020 – today
- 2021
[c3]Ramin Farjadrad, Kambiz Kaviani, David Nguyen, Michael Brown, Govert Geelen, Corné Bastiaansen, Narendra Rao, Viswa Popuri, Greg Shen, Hamid Khatibi, Saudas Dey, Anirban Chatterjee, David Shen, Peter Zijlstra, Harrie Gunnink, Kebin Zhang, Venkat Penumuchu, Oliver Weiss, Edward J. F. Paulus, Joost Briaire:
An Echo-Cancelling Front-End for 112Gb/s PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS. ISSCC 2021: 194-196
2010 – 2019
- 2014
- [c2]Hans Van de Vel, Joost Briaire, Corné Bastiaansen, Pieter C. W. van Beek, Govert Geelen, Harrie Gunnink, Yongjie Jin, Mustafa Kaba, Kerong Luo, Edward J. F. Paulus, Bang Pham, William Relyveld, Peter Zijlstra:
11.7 A 240mW 16b 3.2GS/s DAC in 65nm CMOS with. ISSCC 2014: 206-207
2000 – 2009
- 2009
- [j1]Hans Van de Vel, Berry A. J. Buter, Hendrik van der Ploeg, Maarten Vertregt, Govert J. G. M. Geelen, Edward J. F. Paulus:
A 1.2-V 250-mW 14-b 100-MS/s Digitally Calibrated Pipeline ADC in 90-nm CMOS. IEEE J. Solid State Circuits 44(4): 1047-1056 (2009) - 2006
- [c1]Govert Geelen, Edward J. F. Paulus, Dobson Simanjuntak, Hein Pastoor, René Verlinden:
A 90nm CMOS 1.2V 10b power and speed programmable pipelined ADC with 0.5pJ/conversion-step. ISSCC 2006: 782-791
Coauthor Index
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