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ORCIDSophie Dupuis
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- affiliation: LIRMM, University of Montpellier II, France
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Books and Theses
- 2009
[b1]Sophie Belloeil:
Optimisation des chemins de données arithmétiques par l'utilisation des systèmes de numération redondants. (Optimization of arithmetical data paths using redundant number systems). Pierre and Marie Curie University, Paris, France, 2009
Journal Articles
- 2023
- [j8]Honorio Martín
, Sophie Dupuis, Giorgio Di Natale, Luis Entrena:
Using Approximate Circuits Against Hardware Trojans. IEEE Des. Test 40(3): 8-16 (2023) - [j7]Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini:
Hybrid Protection of Digital FIR Filters. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 812-825 (2023) - 2019
- [j6]Sophie Dupuis, Marie-Lise Flottes:
Logic Locking: A Survey of Proposed Methods and Evaluation Metrics. J. Electron. Test. 35(3): 273-291 (2019) - 2018
- [j5]Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
Protection Against Hardware Trojans With Logic Testing: Proposed Solutions and Challenges Ahead. IEEE Des. Test 35(2): 73-90 (2018) - 2014
- [j4]Sophie Dupuis, Ludovic Noury, Nicolas Fel:
A regular fabric design methodology for applications requiring specific layout-level design rules. Microelectron. J. 45(2): 217-225 (2014) - 2013
- [j3]Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede:
Secure JTAG Implementation Using Schnorr Protocol. J. Electron. Test. 29(2): 193-209 (2013) - [j2]Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez:
Exploring redundant arithmetics in computer-aided design of arithmetic datapaths. Integr. 46(2): 104-118 (2013) - [j1]Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis. Inf. Secur. J. A Glob. Perspect. 22(5-6): 226-236 (2013)
Conference and Workshop Papers
- 2024
- [c23]Nassim Riadi, Florent Bruguier, Pascal Benoit, Sophie Dupuis, Marie-Lise Flottes:
Power Analysis Attack Against post-SAT Logic Locking schemes. ETS 2024: 1-6 - [c22]Sophie Dupuis, Nassim Riadi, Clémy Moroukian, Florence Azaïs, Marie-Lise Flottes:
Logic Locking: Exploration of a new key-gate based on tristate logic. LATS 2024: 1-6 - 2023
- [c21]Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini:
Resynthesis-based Attacks Against Logic Locking. ISQED 2023: 1-8 - 2021
- [c20]Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini:
High-level Intellectual Property Obfuscation via Decoy Constants. IOLTS 2021: 1-7 - [c19]Quang-Linh Nguyen, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
On Preventing SAT Attack with Decoy Key-Inputs. ISVLSI 2021: 114-119 - 2020
- [c18]Florence Azaïs, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzèrho, Laurent Latorre, François Lefèvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel:
Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs. IOLTS 2020: 1-4 - [c17]Quang-Linh Nguyen, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
A Secure Scan Controller for Protecting Logic Locking. IOLTS 2020: 1-6 - 2019
- [c16]Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Sophie Dupuis, Bruno Rouzeyre:
Providing Confidentiality and Integrity in Ultra Low Power IoT Devices. DTIS 2019: 1-6 - [c15]Marc Merandat, Vincent Reynaud, Emanuele Valea, Jérôme Quévremont, Nicolas Valette, Paolo Maistri, Régis Leveugle, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre, Giorgio Di Natale:
A Comprehensive Approach to a Trusted Test Infrastructure. IVSW 2019: 43-48 - 2018
- [c14]Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
SI ECCS: SECure context saving for IoT devices. DTIS 2018: 1-2 - [c13]Honorio Martín, Luis Entrena, Sophie Dupuis, Giorgio Di Natale:
A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation. IOLTS 2018: 41-42 - [c12]Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre:
A New Secure Stream Cipher for Scan Chain Encryption. IVSW 2018: 68-73 - [c11]Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre:
Encryption of test data: which cipher is better? PRIME 2018: 85-88 - 2017
- [c10]Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
Hacking the Control Flow error detection mechanism. IVSW 2017: 51-56 - 2016
- [c9]Papa-Sidi Ba, Sophie Dupuis, Palanichamy Manikandan, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique. ISVLSI 2016: 254-259 - [c8]Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
Using outliers to detect stealthy hardware trojan triggering? IVSW 2016: 1-6 - 2015
- [c7]Sophie Dupuis, Papa-Sidi Ba, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
New testing procedure for finding insertion sites of stealthy hardware trojans. DATE 2015: 776-781 - [c6]Marie-Lise Flottes, Sophie Dupuis, Papa-Sidi Ba, Bruno Rouzeyre:
On the limitations of logic testing for detecting Hardware Trojans Horses. DTIS 2015: 1-5 - [c5]Papa-Sidi Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
Hardware Trojan prevention using layout-level design approach. ECCTD 2015: 1-4 - 2014
- [c4]Sophie Dupuis, Papa-Sidi Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans. IOLTS 2014: 49-54 - 2012
- [c3]Ludovic Noury, Sophie Dupuis, Nicolas Fel:
A reference low-complexity structured ASIC. ISCAS 2012: 2709-2712 - 2011
- [c2]Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez:
Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools. ISQED 2011: 502-507 - 2008
- [c1]Sophie Belloeil, Roselyne Chotin-Avot, Habib Mehrez:
Arithmetic Data Path Optimization Using Borrow-Save Representation. ISVLSI 2008: 4-9
Informal and Other Publications
- 2023
- [i4]Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini:
Resynthesis-based Attacks Against Logic Locking. CoRR abs/2301.04400 (2023) - [i3]Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini:
Hybrid Protection of Digital FIR Filters. CoRR abs/2301.11115 (2023) - 2021
- [i2]Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini:
High-level Intellectual Property Obfuscation via Decoy Constants. CoRR abs/2105.06122 (2021) - 2019
- [i1]Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
SECCS: SECure Context Saving for IoT Devices. CoRR abs/1903.04314 (2019)
Coauthor Index
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