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2020 – today
- 2022
[j4]Linzhe Li
, Liyi Xiao, He Liu, Zhigang Mao:
Synergistic Effect of BTI and Process Variations on the Soft Error Rate Estimation in Digital Circuits. IEEE Access 10: 64161-64171 (2022)- [j3]Jie Li, Liyi Xiao, Linzhe Li, Hongchen Li, He Liu, Chenxu Wang:
A Write-Buffer Scheme to Protect Cache Memories Against Multiple-Bit Errors. IEEE Access 10: 89000-89010 (2022) - [j2]Jie Li, Liyi Xiao, Linzhe Li, Hongchen Li, He Liu, Chenxu Wang:
A Low-Cost Error-Tolerant Flip-Flop Against SET and SEU for Dependable Designs. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2721-2729 (2022) - 2020
- [j1]Rongsheng Zhang, Liyi Xiao, Jie Li, Xuebing Cao, Linzhe Li:
An Adjustable and Fast Error Repair Scrubbing Method Based on Xilinx Essential Bits Technology for SRAM-Based FPGA. IEEE Trans. Reliab. 69(2): 430-439 (2020)
2010 – 2019
- 2019
- [c3]Linzhe Li, Liyi Xiao, Jie Li, He Liu, Zhigang Mao:
Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit. ASICON 2019: 1-4 - [c2]Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Tianqi Wang:
Simulation of Proton Induced Single Event Upsets in Bulk Nano-CMOS SRAMs. ICICDT 2019: 1-4 - 2018
- [c1]Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Jiaqiang Li, Jinxiang Wang:
Soft error optimization of combinational circuit based on gate sizing and multi-objective particle swarm optimization algorithm. IOLTS 2018: 165-170
Coauthor Index
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